STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_ll_wwdg.h 00004 * @author MCD Application Team 00005 * @brief Header file of WWDG LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_LL_WWDG_H 00038 #define __STM32F4xx_LL_WWDG_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32f4xx.h" 00046 00047 /** @addtogroup STM32F4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (WWDG) 00052 00053 /** @defgroup WWDG_LL WWDG 00054 * @{ 00055 */ 00056 00057 /* Private types -------------------------------------------------------------*/ 00058 /* Private variables ---------------------------------------------------------*/ 00059 00060 /* Private constants ---------------------------------------------------------*/ 00061 00062 /* Private macros ------------------------------------------------------------*/ 00063 00064 /* Exported types ------------------------------------------------------------*/ 00065 /* Exported constants --------------------------------------------------------*/ 00066 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants 00067 * @{ 00068 */ 00069 00070 00071 /** @defgroup WWDG_LL_EC_IT IT Defines 00072 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions 00073 * @{ 00074 */ 00075 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI 00076 /** 00077 * @} 00078 */ 00079 00080 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER 00081 * @{ 00082 */ 00083 #define LL_WWDG_PRESCALER_1 (uint32_t)0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */ 00084 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 00085 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 00086 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 00087 /** 00088 * @} 00089 */ 00090 00091 /** 00092 * @} 00093 */ 00094 00095 /* Exported macro ------------------------------------------------------------*/ 00096 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros 00097 * @{ 00098 */ 00099 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros 00100 * @{ 00101 */ 00102 /** 00103 * @brief Write a value in WWDG register 00104 * @param __INSTANCE__ WWDG Instance 00105 * @param __REG__ Register to be written 00106 * @param __VALUE__ Value to be written in the register 00107 * @retval None 00108 */ 00109 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00110 00111 /** 00112 * @brief Read a value in WWDG register 00113 * @param __INSTANCE__ WWDG Instance 00114 * @param __REG__ Register to be read 00115 * @retval Register value 00116 */ 00117 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00118 /** 00119 * @} 00120 */ 00121 00122 00123 /** 00124 * @} 00125 */ 00126 00127 /* Exported functions --------------------------------------------------------*/ 00128 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions 00129 * @{ 00130 */ 00131 00132 /** @defgroup WWDG_LL_EF_Configuration Configuration 00133 * @{ 00134 */ 00135 /** 00136 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. 00137 * @note It is enabled by setting the WDGA bit in the WWDG_CR register, 00138 * then it cannot be disabled again except by a reset. 00139 * This bit is set by software and only cleared by hardware after a reset. 00140 * When WDGA = 1, the watchdog can generate a reset. 00141 * @rmtoll CR WDGA LL_WWDG_Enable 00142 * @param WWDGx WWDG Instance 00143 * @retval None 00144 */ 00145 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) 00146 { 00147 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); 00148 } 00149 00150 /** 00151 * @brief Checks if Window Watchdog is enabled 00152 * @rmtoll CR WDGA LL_WWDG_IsEnabled 00153 * @param WWDGx WWDG Instance 00154 * @retval State of bit (1 or 0). 00155 */ 00156 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) 00157 { 00158 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)); 00159 } 00160 00161 /** 00162 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) 00163 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset 00164 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles 00165 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) 00166 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) 00167 * @rmtoll CR T LL_WWDG_SetCounter 00168 * @param WWDGx WWDG Instance 00169 * @param Counter 0..0x7F (7 bit counter value) 00170 * @retval None 00171 */ 00172 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) 00173 { 00174 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); 00175 } 00176 00177 /** 00178 * @brief Return current Watchdog Counter Value (7 bits counter value) 00179 * @rmtoll CR T LL_WWDG_GetCounter 00180 * @param WWDGx WWDG Instance 00181 * @retval 7 bit Watchdog Counter value 00182 */ 00183 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) 00184 { 00185 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T)); 00186 } 00187 00188 /** 00189 * @brief Set the time base of the prescaler (WDGTB). 00190 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter 00191 * is decremented every (4096 x 2expWDGTB) PCLK cycles 00192 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler 00193 * @param WWDGx WWDG Instance 00194 * @param Prescaler This parameter can be one of the following values: 00195 * @arg @ref LL_WWDG_PRESCALER_1 00196 * @arg @ref LL_WWDG_PRESCALER_2 00197 * @arg @ref LL_WWDG_PRESCALER_4 00198 * @arg @ref LL_WWDG_PRESCALER_8 00199 * @retval None 00200 */ 00201 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) 00202 { 00203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); 00204 } 00205 00206 /** 00207 * @brief Return current Watchdog Prescaler Value 00208 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler 00209 * @param WWDGx WWDG Instance 00210 * @retval Returned value can be one of the following values: 00211 * @arg @ref LL_WWDG_PRESCALER_1 00212 * @arg @ref LL_WWDG_PRESCALER_2 00213 * @arg @ref LL_WWDG_PRESCALER_4 00214 * @arg @ref LL_WWDG_PRESCALER_8 00215 */ 00216 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) 00217 { 00218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); 00219 } 00220 00221 /** 00222 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). 00223 * @note This window value defines when write in the WWDG_CR register 00224 * to program Watchdog counter is allowed. 00225 * Watchdog counter value update must occur only when the counter value 00226 * is lower than the Watchdog window register value. 00227 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value 00228 * (in the control register) is refreshed before the downcounter has reached 00229 * the watchdog window register value. 00230 * Physically is possible to set the Window lower then 0x40 but it is not recommended. 00231 * To generate an immediate reset, it is possible to set the Counter lower than 0x40. 00232 * @rmtoll CFR W LL_WWDG_SetWindow 00233 * @param WWDGx WWDG Instance 00234 * @param Window 0x00..0x7F (7 bit Window value) 00235 * @retval None 00236 */ 00237 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) 00238 { 00239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); 00240 } 00241 00242 /** 00243 * @brief Return current Watchdog Window Value (7 bits value) 00244 * @rmtoll CFR W LL_WWDG_GetWindow 00245 * @param WWDGx WWDG Instance 00246 * @retval 7 bit Watchdog Window value 00247 */ 00248 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) 00249 { 00250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W)); 00251 } 00252 00253 /** 00254 * @} 00255 */ 00256 00257 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management 00258 * @{ 00259 */ 00260 /** 00261 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. 00262 * @note This bit is set by hardware when the counter has reached the value 0x40. 00263 * It must be cleared by software by writing 0. 00264 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. 00265 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP 00266 * @param WWDGx WWDG Instance 00267 * @retval State of bit (1 or 0). 00268 */ 00269 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) 00270 { 00271 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)); 00272 } 00273 00274 /** 00275 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) 00276 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP 00277 * @param WWDGx WWDG Instance 00278 * @retval None 00279 */ 00280 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) 00281 { 00282 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); 00283 } 00284 00285 /** 00286 * @} 00287 */ 00288 00289 /** @defgroup WWDG_LL_EF_IT_Management IT_Management 00290 * @{ 00291 */ 00292 /** 00293 * @brief Enable the Early Wakeup Interrupt. 00294 * @note When set, an interrupt occurs whenever the counter reaches value 0x40. 00295 * This interrupt is only cleared by hardware after a reset 00296 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP 00297 * @param WWDGx WWDG Instance 00298 * @retval None 00299 */ 00300 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) 00301 { 00302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); 00303 } 00304 00305 /** 00306 * @brief Check if Early Wakeup Interrupt is enabled 00307 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP 00308 * @param WWDGx WWDG Instance 00309 * @retval State of bit (1 or 0). 00310 */ 00311 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) 00312 { 00313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)); 00314 } 00315 00316 /** 00317 * @} 00318 */ 00319 00320 /** 00321 * @} 00322 */ 00323 00324 /** 00325 * @} 00326 */ 00327 00328 #endif /* WWDG */ 00329 00330 /** 00331 * @} 00332 */ 00333 00334 #ifdef __cplusplus 00335 } 00336 #endif 00337 00338 #endif /* __STM32F4xx_LL_WWDG_H */ 00339 00340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/