STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_ll_usart.c 00004 * @author MCD Application Team 00005 * @brief USART LL module driver. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 #if defined(USE_FULL_LL_DRIVER) 00036 00037 /* Includes ------------------------------------------------------------------*/ 00038 #include "stm32f4xx_ll_usart.h" 00039 #include "stm32f4xx_ll_rcc.h" 00040 #include "stm32f4xx_ll_bus.h" 00041 #ifdef USE_FULL_ASSERT 00042 #include "stm32_assert.h" 00043 #else 00044 #define assert_param(expr) ((void)0U) 00045 #endif 00046 00047 /** @addtogroup STM32F4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10) 00052 00053 /** @addtogroup USART_LL 00054 * @{ 00055 */ 00056 00057 /* Private types -------------------------------------------------------------*/ 00058 /* Private variables ---------------------------------------------------------*/ 00059 /* Private constants ---------------------------------------------------------*/ 00060 /** @addtogroup USART_LL_Private_Constants 00061 * @{ 00062 */ 00063 00064 /** 00065 * @} 00066 */ 00067 00068 00069 /* Private macros ------------------------------------------------------------*/ 00070 /** @addtogroup USART_LL_Private_Macros 00071 * @{ 00072 */ 00073 00074 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available 00075 * divided by the smallest oversampling used on the USART (i.e. 8) */ 00076 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U) 00077 00078 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ 00079 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) 00080 00081 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */ 00082 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU) 00083 00084 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ 00085 || ((__VALUE__) == LL_USART_DIRECTION_RX) \ 00086 || ((__VALUE__) == LL_USART_DIRECTION_TX) \ 00087 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) 00088 00089 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ 00090 || ((__VALUE__) == LL_USART_PARITY_EVEN) \ 00091 || ((__VALUE__) == LL_USART_PARITY_ODD)) 00092 00093 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ 00094 || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) 00095 00096 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ 00097 || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) 00098 00099 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ 00100 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) 00101 00102 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ 00103 || ((__VALUE__) == LL_USART_PHASE_2EDGE)) 00104 00105 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ 00106 || ((__VALUE__) == LL_USART_POLARITY_HIGH)) 00107 00108 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ 00109 || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) 00110 00111 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ 00112 || ((__VALUE__) == LL_USART_STOPBITS_1) \ 00113 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ 00114 || ((__VALUE__) == LL_USART_STOPBITS_2)) 00115 00116 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ 00117 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ 00118 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ 00119 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) 00120 00121 /** 00122 * @} 00123 */ 00124 00125 /* Private function prototypes -----------------------------------------------*/ 00126 00127 /* Exported functions --------------------------------------------------------*/ 00128 /** @addtogroup USART_LL_Exported_Functions 00129 * @{ 00130 */ 00131 00132 /** @addtogroup USART_LL_EF_Init 00133 * @{ 00134 */ 00135 00136 /** 00137 * @brief De-initialize USART registers (Registers restored to their default values). 00138 * @param USARTx USART Instance 00139 * @retval An ErrorStatus enumeration value: 00140 * - SUCCESS: USART registers are de-initialized 00141 * - ERROR: USART registers are not de-initialized 00142 */ 00143 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) 00144 { 00145 ErrorStatus status = SUCCESS; 00146 00147 /* Check the parameters */ 00148 assert_param(IS_UART_INSTANCE(USARTx)); 00149 00150 if (USARTx == USART1) 00151 { 00152 /* Force reset of USART clock */ 00153 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); 00154 00155 /* Release reset of USART clock */ 00156 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); 00157 } 00158 else if (USARTx == USART2) 00159 { 00160 /* Force reset of USART clock */ 00161 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); 00162 00163 /* Release reset of USART clock */ 00164 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); 00165 } 00166 #if defined(USART3) 00167 else if (USARTx == USART3) 00168 { 00169 /* Force reset of USART clock */ 00170 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); 00171 00172 /* Release reset of USART clock */ 00173 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); 00174 } 00175 #endif /* USART3 */ 00176 #if defined(USART6) 00177 else if (USARTx == USART6) 00178 { 00179 /* Force reset of USART clock */ 00180 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6); 00181 00182 /* Release reset of USART clock */ 00183 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6); 00184 } 00185 #endif /* USART6 */ 00186 #if defined(UART4) 00187 else if (USARTx == UART4) 00188 { 00189 /* Force reset of UART clock */ 00190 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4); 00191 00192 /* Release reset of UART clock */ 00193 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4); 00194 } 00195 #endif /* UART4 */ 00196 #if defined(UART5) 00197 else if (USARTx == UART5) 00198 { 00199 /* Force reset of UART clock */ 00200 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5); 00201 00202 /* Release reset of UART clock */ 00203 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5); 00204 } 00205 #endif /* UART5 */ 00206 #if defined(UART7) 00207 else if (USARTx == UART7) 00208 { 00209 /* Force reset of UART clock */ 00210 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7); 00211 00212 /* Release reset of UART clock */ 00213 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7); 00214 } 00215 #endif /* UART7 */ 00216 #if defined(UART8) 00217 else if (USARTx == UART8) 00218 { 00219 /* Force reset of UART clock */ 00220 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8); 00221 00222 /* Release reset of UART clock */ 00223 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8); 00224 } 00225 #endif /* UART8 */ 00226 #if defined(UART9) 00227 else if (USARTx == UART9) 00228 { 00229 /* Force reset of UART clock */ 00230 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9); 00231 00232 /* Release reset of UART clock */ 00233 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9); 00234 } 00235 #endif /* UART9 */ 00236 #if defined(UART10) 00237 else if (USARTx == UART10) 00238 { 00239 /* Force reset of UART clock */ 00240 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10); 00241 00242 /* Release reset of UART clock */ 00243 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10); 00244 } 00245 #endif /* UART10 */ 00246 else 00247 { 00248 status = ERROR; 00249 } 00250 00251 return (status); 00252 } 00253 00254 /** 00255 * @brief Initialize USART registers according to the specified 00256 * parameters in USART_InitStruct. 00257 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), 00258 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. 00259 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). 00260 * @param USARTx USART Instance 00261 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure 00262 * that contains the configuration information for the specified USART peripheral. 00263 * @retval An ErrorStatus enumeration value: 00264 * - SUCCESS: USART registers are initialized according to USART_InitStruct content 00265 * - ERROR: Problem occurred during USART Registers initialization 00266 */ 00267 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) 00268 { 00269 ErrorStatus status = ERROR; 00270 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; 00271 LL_RCC_ClocksTypeDef rcc_clocks; 00272 00273 /* Check the parameters */ 00274 assert_param(IS_UART_INSTANCE(USARTx)); 00275 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); 00276 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); 00277 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); 00278 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); 00279 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); 00280 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); 00281 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); 00282 00283 /* USART needs to be in disabled state, in order to be able to configure some bits in 00284 CRx registers */ 00285 if (LL_USART_IsEnabled(USARTx) == 0U) 00286 { 00287 /*---------------------------- USART CR1 Configuration ----------------------- 00288 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: 00289 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value 00290 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value 00291 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value 00292 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. 00293 */ 00294 MODIFY_REG(USARTx->CR1, 00295 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | 00296 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 00297 (USART_InitStruct->DataWidth | USART_InitStruct->Parity | 00298 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); 00299 00300 /*---------------------------- USART CR2 Configuration ----------------------- 00301 * Configure USARTx CR2 (Stop bits) with parameters: 00302 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. 00303 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). 00304 */ 00305 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); 00306 00307 /*---------------------------- USART CR3 Configuration ----------------------- 00308 * Configure USARTx CR3 (Hardware Flow Control) with parameters: 00309 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value. 00310 */ 00311 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); 00312 00313 /*---------------------------- USART BRR Configuration ----------------------- 00314 * Retrieve Clock frequency used for USART Peripheral 00315 */ 00316 LL_RCC_GetSystemClocksFreq(&rcc_clocks); 00317 if (USARTx == USART1) 00318 { 00319 periphclk = rcc_clocks.PCLK2_Frequency; 00320 } 00321 else if (USARTx == USART2) 00322 { 00323 periphclk = rcc_clocks.PCLK1_Frequency; 00324 } 00325 #if defined(USART3) 00326 else if (USARTx == USART3) 00327 { 00328 periphclk = rcc_clocks.PCLK1_Frequency; 00329 } 00330 #endif /* USART3 */ 00331 #if defined(USART6) 00332 else if (USARTx == USART6) 00333 { 00334 periphclk = rcc_clocks.PCLK2_Frequency; 00335 } 00336 #endif /* USART6 */ 00337 #if defined(UART4) 00338 else if (USARTx == UART4) 00339 { 00340 periphclk = rcc_clocks.PCLK1_Frequency; 00341 } 00342 #endif /* UART4 */ 00343 #if defined(UART5) 00344 else if (USARTx == UART5) 00345 { 00346 periphclk = rcc_clocks.PCLK1_Frequency; 00347 } 00348 #endif /* UART5 */ 00349 #if defined(UART7) 00350 else if (USARTx == UART7) 00351 { 00352 periphclk = rcc_clocks.PCLK1_Frequency; 00353 } 00354 #endif /* UART7 */ 00355 #if defined(UART8) 00356 else if (USARTx == UART8) 00357 { 00358 periphclk = rcc_clocks.PCLK1_Frequency; 00359 } 00360 #endif /* UART8 */ 00361 #if defined(UART9) 00362 else if (USARTx == UART9) 00363 { 00364 periphclk = rcc_clocks.PCLK1_Frequency; 00365 } 00366 #endif /* UART9 */ 00367 #if defined(UART10) 00368 else if (USARTx == UART10) 00369 { 00370 periphclk = rcc_clocks.PCLK1_Frequency; 00371 } 00372 #endif /* UART10 */ 00373 else 00374 { 00375 /* Nothing to do, as error code is already assigned to ERROR value */ 00376 } 00377 00378 /* Configure the USART Baud Rate : 00379 - valid baud rate value (different from 0) is required 00380 - Peripheral clock as returned by RCC service, should be valid (different from 0). 00381 */ 00382 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) 00383 && (USART_InitStruct->BaudRate != 0U)) 00384 { 00385 status = SUCCESS; 00386 LL_USART_SetBaudRate(USARTx, 00387 periphclk, 00388 USART_InitStruct->OverSampling, 00389 USART_InitStruct->BaudRate); 00390 00391 /* Check BRR is greater than or equal to 16d */ 00392 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); 00393 00394 /* Check BRR is greater than or equal to 16d */ 00395 assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR)); 00396 } 00397 } 00398 /* Endif (=> USART not in Disabled state => return ERROR) */ 00399 00400 return (status); 00401 } 00402 00403 /** 00404 * @brief Set each @ref LL_USART_InitTypeDef field to default value. 00405 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure 00406 * whose fields will be set to default values. 00407 * @retval None 00408 */ 00409 00410 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) 00411 { 00412 /* Set USART_InitStruct fields to default values */ 00413 USART_InitStruct->BaudRate = 9600U; 00414 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; 00415 USART_InitStruct->StopBits = LL_USART_STOPBITS_1; 00416 USART_InitStruct->Parity = LL_USART_PARITY_NONE ; 00417 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; 00418 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; 00419 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; 00420 } 00421 00422 /** 00423 * @brief Initialize USART Clock related settings according to the 00424 * specified parameters in the USART_ClockInitStruct. 00425 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), 00426 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. 00427 * @param USARTx USART Instance 00428 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure 00429 * that contains the Clock configuration information for the specified USART peripheral. 00430 * @retval An ErrorStatus enumeration value: 00431 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content 00432 * - ERROR: Problem occurred during USART Registers initialization 00433 */ 00434 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) 00435 { 00436 ErrorStatus status = SUCCESS; 00437 00438 /* Check USART Instance and Clock signal output parameters */ 00439 assert_param(IS_UART_INSTANCE(USARTx)); 00440 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); 00441 00442 /* USART needs to be in disabled state, in order to be able to configure some bits in 00443 CRx registers */ 00444 if (LL_USART_IsEnabled(USARTx) == 0U) 00445 { 00446 /*---------------------------- USART CR2 Configuration -----------------------*/ 00447 /* If Clock signal has to be output */ 00448 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) 00449 { 00450 /* Deactivate Clock signal delivery : 00451 * - Disable Clock Output: USART_CR2_CLKEN cleared 00452 */ 00453 LL_USART_DisableSCLKOutput(USARTx); 00454 } 00455 else 00456 { 00457 /* Ensure USART instance is USART capable */ 00458 assert_param(IS_USART_INSTANCE(USARTx)); 00459 00460 /* Check clock related parameters */ 00461 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); 00462 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); 00463 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); 00464 00465 /*---------------------------- USART CR2 Configuration ----------------------- 00466 * Configure USARTx CR2 (Clock signal related bits) with parameters: 00467 * - Enable Clock Output: USART_CR2_CLKEN set 00468 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value 00469 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value 00470 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. 00471 */ 00472 MODIFY_REG(USARTx->CR2, 00473 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, 00474 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | 00475 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); 00476 } 00477 } 00478 /* Else (USART not in Disabled state => return ERROR */ 00479 else 00480 { 00481 status = ERROR; 00482 } 00483 00484 return (status); 00485 } 00486 00487 /** 00488 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. 00489 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure 00490 * whose fields will be set to default values. 00491 * @retval None 00492 */ 00493 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) 00494 { 00495 /* Set LL_USART_ClockInitStruct fields with default values */ 00496 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; 00497 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ 00498 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ 00499 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ 00500 } 00501 00502 /** 00503 * @} 00504 */ 00505 00506 /** 00507 * @} 00508 */ 00509 00510 /** 00511 * @} 00512 */ 00513 00514 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */ 00515 00516 /** 00517 * @} 00518 */ 00519 00520 #endif /* USE_FULL_LL_DRIVER */ 00521 00522 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00523