STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_ll_lptim.h 00004 * @author MCD Application Team 00005 * @brief Header file of LPTIM LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_LL_LPTIM_H 00038 #define __STM32F4xx_LL_LPTIM_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32f4xx.h" 00046 00047 /** @addtogroup STM32F4xx_LL_Driver 00048 * @{ 00049 */ 00050 #if defined (LPTIM1) 00051 00052 /** @defgroup LPTIM_LL LPTIM 00053 * @{ 00054 */ 00055 00056 /* Private types -------------------------------------------------------------*/ 00057 /* Private variables ---------------------------------------------------------*/ 00058 00059 /* Private constants ---------------------------------------------------------*/ 00060 00061 /* Private macros ------------------------------------------------------------*/ 00062 #if defined(USE_FULL_LL_DRIVER) 00063 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros 00064 * @{ 00065 */ 00066 /** 00067 * @} 00068 */ 00069 #endif /*USE_FULL_LL_DRIVER*/ 00070 00071 /* Exported types ------------------------------------------------------------*/ 00072 #if defined(USE_FULL_LL_DRIVER) 00073 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure 00074 * @{ 00075 */ 00076 00077 /** 00078 * @brief LPTIM Init structure definition 00079 */ 00080 typedef struct 00081 { 00082 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance. 00083 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE. 00084 00085 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/ 00086 00087 uint32_t Prescaler; /*!< Specifies the prescaler division ratio. 00088 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER. 00089 00090 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/ 00091 00092 uint32_t Waveform; /*!< Specifies the waveform shape. 00093 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM. 00094 00095 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ 00096 00097 uint32_t Polarity; /*!< Specifies waveform polarity. 00098 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY. 00099 00100 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ 00101 } LL_LPTIM_InitTypeDef; 00102 00103 /** 00104 * @} 00105 */ 00106 #endif /* USE_FULL_LL_DRIVER */ 00107 00108 /* Exported constants --------------------------------------------------------*/ 00109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants 00110 * @{ 00111 */ 00112 00113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines 00114 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function 00115 * @{ 00116 */ 00117 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */ 00118 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */ 00119 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */ 00120 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */ 00121 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */ 00122 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */ 00123 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */ 00124 /** 00125 * @} 00126 */ 00127 00128 /** @defgroup LPTIM_LL_EC_IT IT Defines 00129 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions 00130 * @{ 00131 */ 00132 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */ 00133 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */ 00134 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */ 00135 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */ 00136 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */ 00137 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */ 00138 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */ 00139 /** 00140 * @} 00141 */ 00142 00143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode 00144 * @{ 00145 */ 00146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/ 00147 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/ 00148 /** 00149 * @} 00150 */ 00151 00152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode 00153 * @{ 00154 */ 00155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/ 00156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/ 00157 /** 00158 * @} 00159 */ 00160 00161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode 00162 * @{ 00163 */ 00164 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/ 00165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/ 00166 /** 00167 * @} 00168 */ 00169 00170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type 00171 * @{ 00172 */ 00173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/ 00174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/ 00175 /** 00176 * @} 00177 */ 00178 00179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity 00180 * @{ 00181 */ 00182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/ 00183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/ 00184 /** 00185 * @} 00186 */ 00187 00188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value 00189 * @{ 00190 */ 00191 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/ 00192 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/ 00193 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/ 00194 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/ 00195 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/ 00196 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/ 00197 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/ 00198 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/ 00199 /** 00200 * @} 00201 */ 00202 00203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source 00204 * @{ 00205 */ 00206 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/ 00207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/ 00208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/ 00209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/ 00210 #define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/ 00211 #define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/ 00212 /** 00213 * @} 00214 */ 00215 00216 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter 00217 * @{ 00218 */ 00219 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/ 00220 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/ 00221 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/ 00222 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/ 00223 /** 00224 * @} 00225 */ 00226 00227 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity 00228 * @{ 00229 */ 00230 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/ 00231 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/ 00232 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/ 00233 /** 00234 * @} 00235 */ 00236 00237 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source 00238 * @{ 00239 */ 00240 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/ 00241 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/ 00242 /** 00243 * @} 00244 */ 00245 00246 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter 00247 * @{ 00248 */ 00249 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/ 00250 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/ 00251 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/ 00252 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/ 00253 /** 00254 * @} 00255 */ 00256 00257 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity 00258 * @{ 00259 */ 00260 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/ 00261 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/ 00262 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/ 00263 /** 00264 * @} 00265 */ 00266 00267 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode 00268 * @{ 00269 */ 00270 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/ 00271 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/ 00272 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/ 00273 /** 00274 * @} 00275 */ 00276 00277 00278 /** 00279 * @} 00280 */ 00281 00282 /* Exported macro ------------------------------------------------------------*/ 00283 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros 00284 * @{ 00285 */ 00286 00287 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros 00288 * @{ 00289 */ 00290 00291 /** 00292 * @brief Write a value in LPTIM register 00293 * @param __INSTANCE__ LPTIM Instance 00294 * @param __REG__ Register to be written 00295 * @param __VALUE__ Value to be written in the register 00296 * @retval None 00297 */ 00298 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00299 00300 /** 00301 * @brief Read a value in LPTIM register 00302 * @param __INSTANCE__ LPTIM Instance 00303 * @param __REG__ Register to be read 00304 * @retval Register value 00305 */ 00306 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00307 /** 00308 * @} 00309 */ 00310 00311 /** 00312 * @} 00313 */ 00314 00315 00316 /* Exported functions --------------------------------------------------------*/ 00317 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions 00318 * @{ 00319 */ 00320 00321 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration 00322 * @{ 00323 */ 00324 00325 /** 00326 * @brief Enable the LPTIM instance 00327 * @note After setting the ENABLE bit, a delay of two counter clock is needed 00328 * before the LPTIM instance is actually enabled. 00329 * @rmtoll CR ENABLE LL_LPTIM_Enable 00330 * @param LPTIMx Low-Power Timer instance 00331 * @retval None 00332 */ 00333 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx) 00334 { 00335 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE); 00336 } 00337 00338 /** 00339 * @brief Disable the LPTIM instance 00340 * @rmtoll CR ENABLE LL_LPTIM_Disable 00341 * @param LPTIMx Low-Power Timer instance 00342 * @retval None 00343 */ 00344 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) 00345 { 00346 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE); 00347 } 00348 00349 /** 00350 * @brief Indicates whether the LPTIM instance is enabled. 00351 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled 00352 * @param LPTIMx Low-Power Timer instance 00353 * @retval State of bit (1 or 0). 00354 */ 00355 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx) 00356 { 00357 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE)); 00358 } 00359 00360 /** 00361 * @brief Starts the LPTIM counter in the desired mode. 00362 * @note LPTIM instance must be enabled before starting the counter. 00363 * @note It is possible to change on the fly from One Shot mode to 00364 * Continuous mode. 00365 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n 00366 * CR SNGSTRT LL_LPTIM_StartCounter 00367 * @param LPTIMx Low-Power Timer instance 00368 * @param OperatingMode This parameter can be one of the following values: 00369 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS 00370 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT 00371 * @retval None 00372 */ 00373 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode) 00374 { 00375 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode); 00376 } 00377 00378 00379 /** 00380 * @brief Set the LPTIM registers update mode (enable/disable register preload) 00381 * @note This function must be called when the LPTIM instance is disabled. 00382 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode 00383 * @param LPTIMx Low-Power Timer instance 00384 * @param UpdateMode This parameter can be one of the following values: 00385 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE 00386 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD 00387 * @retval None 00388 */ 00389 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode) 00390 { 00391 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode); 00392 } 00393 00394 /** 00395 * @brief Get the LPTIM registers update mode 00396 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode 00397 * @param LPTIMx Low-Power Timer instance 00398 * @retval Returned value can be one of the following values: 00399 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE 00400 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD 00401 */ 00402 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx) 00403 { 00404 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD)); 00405 } 00406 00407 /** 00408 * @brief Set the auto reload value 00409 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled 00410 * @note After a write to the LPTIMx_ARR register a new write operation to the 00411 * same register can only be performed when the previous write operation 00412 * is completed. Any successive write before the ARROK flag be set, will 00413 * lead to unpredictable results. 00414 * @note autoreload value be strictly greater than the compare value. 00415 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload 00416 * @param LPTIMx Low-Power Timer instance 00417 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF 00418 * @retval None 00419 */ 00420 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload) 00421 { 00422 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload); 00423 } 00424 00425 /** 00426 * @brief Get actual auto reload value 00427 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload 00428 * @param LPTIMx Low-Power Timer instance 00429 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF 00430 */ 00431 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx) 00432 { 00433 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR)); 00434 } 00435 00436 /** 00437 * @brief Set the compare value 00438 * @note After a write to the LPTIMx_CMP register a new write operation to the 00439 * same register can only be performed when the previous write operation 00440 * is completed. Any successive write before the CMPOK flag be set, will 00441 * lead to unpredictable results. 00442 * @rmtoll CMP CMP LL_LPTIM_SetCompare 00443 * @param LPTIMx Low-Power Timer instance 00444 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF 00445 * @retval None 00446 */ 00447 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue) 00448 { 00449 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue); 00450 } 00451 00452 /** 00453 * @brief Get actual compare value 00454 * @rmtoll CMP CMP LL_LPTIM_GetCompare 00455 * @param LPTIMx Low-Power Timer instance 00456 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF 00457 */ 00458 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx) 00459 { 00460 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP)); 00461 } 00462 00463 /** 00464 * @brief Get actual counter value 00465 * @note When the LPTIM instance is running with an asynchronous clock, reading 00466 * the LPTIMx_CNT register may return unreliable values. So in this case 00467 * it is necessary to perform two consecutive read accesses and verify 00468 * that the two returned values are identical. 00469 * @rmtoll CNT CNT LL_LPTIM_GetCounter 00470 * @param LPTIMx Low-Power Timer instance 00471 * @retval Counter value 00472 */ 00473 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx) 00474 { 00475 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT)); 00476 } 00477 00478 /** 00479 * @brief Set the counter mode (selection of the LPTIM counter clock source). 00480 * @note The counter mode can be set only when the LPTIM instance is disabled. 00481 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode 00482 * @param LPTIMx Low-Power Timer instance 00483 * @param CounterMode This parameter can be one of the following values: 00484 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL 00485 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL 00486 * @retval None 00487 */ 00488 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode) 00489 { 00490 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode); 00491 } 00492 00493 /** 00494 * @brief Get the counter mode 00495 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode 00496 * @param LPTIMx Low-Power Timer instance 00497 * @retval Returned value can be one of the following values: 00498 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL 00499 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL 00500 */ 00501 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx) 00502 { 00503 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE)); 00504 } 00505 00506 /** 00507 * @brief Configure the LPTIM instance output (LPTIMx_OUT) 00508 * @note This function must be called when the LPTIM instance is disabled. 00509 * @note Regarding the LPTIM output polarity the change takes effect 00510 * immediately, so the output default value will change immediately after 00511 * the polarity is re-configured, even before the timer is enabled. 00512 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n 00513 * CFGR WAVPOL LL_LPTIM_ConfigOutput 00514 * @param LPTIMx Low-Power Timer instance 00515 * @param Waveform This parameter can be one of the following values: 00516 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM 00517 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE 00518 * @param Polarity This parameter can be one of the following values: 00519 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR 00520 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE 00521 * @retval None 00522 */ 00523 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity) 00524 { 00525 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity); 00526 } 00527 00528 /** 00529 * @brief Set waveform shape 00530 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform 00531 * @param LPTIMx Low-Power Timer instance 00532 * @param Waveform This parameter can be one of the following values: 00533 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM 00534 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE 00535 * @retval None 00536 */ 00537 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform) 00538 { 00539 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform); 00540 } 00541 00542 /** 00543 * @brief Get actual waveform shape 00544 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform 00545 * @param LPTIMx Low-Power Timer instance 00546 * @retval Returned value can be one of the following values: 00547 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM 00548 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE 00549 */ 00550 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx) 00551 { 00552 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE)); 00553 } 00554 00555 /** 00556 * @brief Set output polarity 00557 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity 00558 * @param LPTIMx Low-Power Timer instance 00559 * @param Polarity This parameter can be one of the following values: 00560 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR 00561 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE 00562 * @retval None 00563 */ 00564 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity) 00565 { 00566 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity); 00567 } 00568 00569 /** 00570 * @brief Get actual output polarity 00571 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity 00572 * @param LPTIMx Low-Power Timer instance 00573 * @retval Returned value can be one of the following values: 00574 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR 00575 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE 00576 */ 00577 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx) 00578 { 00579 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL)); 00580 } 00581 00582 /** 00583 * @brief Set actual prescaler division ratio. 00584 * @note This function must be called when the LPTIM instance is disabled. 00585 * @note When the LPTIM is configured to be clocked by an internal clock source 00586 * and the LPTIM counter is configured to be updated by active edges 00587 * detected on the LPTIM external Input1, the internal clock provided to 00588 * the LPTIM must be not be prescaled. 00589 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler 00590 * @param LPTIMx Low-Power Timer instance 00591 * @param Prescaler This parameter can be one of the following values: 00592 * @arg @ref LL_LPTIM_PRESCALER_DIV1 00593 * @arg @ref LL_LPTIM_PRESCALER_DIV2 00594 * @arg @ref LL_LPTIM_PRESCALER_DIV4 00595 * @arg @ref LL_LPTIM_PRESCALER_DIV8 00596 * @arg @ref LL_LPTIM_PRESCALER_DIV16 00597 * @arg @ref LL_LPTIM_PRESCALER_DIV32 00598 * @arg @ref LL_LPTIM_PRESCALER_DIV64 00599 * @arg @ref LL_LPTIM_PRESCALER_DIV128 00600 * @retval None 00601 */ 00602 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler) 00603 { 00604 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler); 00605 } 00606 00607 /** 00608 * @brief Get actual prescaler division ratio. 00609 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler 00610 * @param LPTIMx Low-Power Timer instance 00611 * @retval Returned value can be one of the following values: 00612 * @arg @ref LL_LPTIM_PRESCALER_DIV1 00613 * @arg @ref LL_LPTIM_PRESCALER_DIV2 00614 * @arg @ref LL_LPTIM_PRESCALER_DIV4 00615 * @arg @ref LL_LPTIM_PRESCALER_DIV8 00616 * @arg @ref LL_LPTIM_PRESCALER_DIV16 00617 * @arg @ref LL_LPTIM_PRESCALER_DIV32 00618 * @arg @ref LL_LPTIM_PRESCALER_DIV64 00619 * @arg @ref LL_LPTIM_PRESCALER_DIV128 00620 */ 00621 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx) 00622 { 00623 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC)); 00624 } 00625 00626 00627 /** 00628 * @} 00629 */ 00630 00631 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration 00632 * @{ 00633 */ 00634 00635 /** 00636 * @brief Enable the timeout function 00637 * @note This function must be called when the LPTIM instance is disabled. 00638 * @note The first trigger event will start the timer, any successive trigger 00639 * event will reset the counter and the timer will restart. 00640 * @note The timeout value corresponds to the compare value; if no trigger 00641 * occurs within the expected time frame, the MCU is waked-up by the 00642 * compare match event. 00643 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout 00644 * @param LPTIMx Low-Power Timer instance 00645 * @retval None 00646 */ 00647 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx) 00648 { 00649 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT); 00650 } 00651 00652 /** 00653 * @brief Disable the timeout function 00654 * @note This function must be called when the LPTIM instance is disabled. 00655 * @note A trigger event arriving when the timer is already started will be 00656 * ignored. 00657 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout 00658 * @param LPTIMx Low-Power Timer instance 00659 * @retval None 00660 */ 00661 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx) 00662 { 00663 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT); 00664 } 00665 00666 /** 00667 * @brief Indicate whether the timeout function is enabled. 00668 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout 00669 * @param LPTIMx Low-Power Timer instance 00670 * @retval State of bit (1 or 0). 00671 */ 00672 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx) 00673 { 00674 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT)); 00675 } 00676 00677 /** 00678 * @brief Start the LPTIM counter 00679 * @note This function must be called when the LPTIM instance is disabled. 00680 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw 00681 * @param LPTIMx Low-Power Timer instance 00682 * @retval None 00683 */ 00684 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx) 00685 { 00686 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN); 00687 } 00688 00689 /** 00690 * @brief Configure the external trigger used as a trigger event for the LPTIM. 00691 * @note This function must be called when the LPTIM instance is disabled. 00692 * @note An internal clock source must be present when a digital filter is 00693 * required for the trigger. 00694 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n 00695 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n 00696 * CFGR TRIGEN LL_LPTIM_ConfigTrigger 00697 * @param LPTIMx Low-Power Timer instance 00698 * @param Source This parameter can be one of the following values: 00699 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO 00700 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA 00701 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB 00702 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 00703 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO 00704 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO 00705 * @param Filter This parameter can be one of the following values: 00706 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE 00707 * @arg @ref LL_LPTIM_TRIG_FILTER_2 00708 * @arg @ref LL_LPTIM_TRIG_FILTER_4 00709 * @arg @ref LL_LPTIM_TRIG_FILTER_8 00710 * @param Polarity This parameter can be one of the following values: 00711 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING 00712 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING 00713 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING 00714 * (*) value not defined in all devices. 00715 * @retval None 00716 */ 00717 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity) 00718 { 00719 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity); 00720 } 00721 00722 /** 00723 * @brief Get actual external trigger source. 00724 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource 00725 * @param LPTIMx Low-Power Timer instance 00726 * @retval Returned value can be one of the following values: 00727 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO 00728 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA 00729 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB 00730 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 00731 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO 00732 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO 00733 */ 00734 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx) 00735 { 00736 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL)); 00737 } 00738 00739 /** 00740 * @brief Get actual external trigger filter. 00741 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter 00742 * @param LPTIMx Low-Power Timer instance 00743 * @retval Returned value can be one of the following values: 00744 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE 00745 * @arg @ref LL_LPTIM_TRIG_FILTER_2 00746 * @arg @ref LL_LPTIM_TRIG_FILTER_4 00747 * @arg @ref LL_LPTIM_TRIG_FILTER_8 00748 */ 00749 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx) 00750 { 00751 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT)); 00752 } 00753 00754 /** 00755 * @brief Get actual external trigger polarity. 00756 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity 00757 * @param LPTIMx Low-Power Timer instance 00758 * @retval Returned value can be one of the following values: 00759 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING 00760 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING 00761 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING 00762 */ 00763 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx) 00764 { 00765 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN)); 00766 } 00767 00768 /** 00769 * @} 00770 */ 00771 00772 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration 00773 * @{ 00774 */ 00775 00776 /** 00777 * @brief Set the source of the clock used by the LPTIM instance. 00778 * @note This function must be called when the LPTIM instance is disabled. 00779 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource 00780 * @param LPTIMx Low-Power Timer instance 00781 * @param ClockSource This parameter can be one of the following values: 00782 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL 00783 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL 00784 * @retval None 00785 */ 00786 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource) 00787 { 00788 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource); 00789 } 00790 00791 /** 00792 * @brief Get actual LPTIM instance clock source. 00793 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource 00794 * @param LPTIMx Low-Power Timer instance 00795 * @retval Returned value can be one of the following values: 00796 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL 00797 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL 00798 */ 00799 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx) 00800 { 00801 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL)); 00802 } 00803 00804 /** 00805 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source. 00806 * @note This function must be called when the LPTIM instance is disabled. 00807 * @note When both external clock signal edges are considered active ones, 00808 * the LPTIM must also be clocked by an internal clock source with a 00809 * frequency equal to at least four times the external clock frequency. 00810 * @note An internal clock source must be present when a digital filter is 00811 * required for external clock. 00812 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n 00813 * CFGR CKPOL LL_LPTIM_ConfigClock 00814 * @param LPTIMx Low-Power Timer instance 00815 * @param ClockFilter This parameter can be one of the following values: 00816 * @arg @ref LL_LPTIM_CLK_FILTER_NONE 00817 * @arg @ref LL_LPTIM_CLK_FILTER_2 00818 * @arg @ref LL_LPTIM_CLK_FILTER_4 00819 * @arg @ref LL_LPTIM_CLK_FILTER_8 00820 * @param ClockPolarity This parameter can be one of the following values: 00821 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING 00822 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING 00823 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING 00824 * @retval None 00825 */ 00826 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity) 00827 { 00828 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity); 00829 } 00830 00831 /** 00832 * @brief Get actual clock polarity 00833 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity 00834 * @param LPTIMx Low-Power Timer instance 00835 * @retval Returned value can be one of the following values: 00836 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING 00837 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING 00838 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING 00839 */ 00840 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx) 00841 { 00842 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL)); 00843 } 00844 00845 /** 00846 * @brief Get actual clock digital filter 00847 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter 00848 * @param LPTIMx Low-Power Timer instance 00849 * @retval Returned value can be one of the following values: 00850 * @arg @ref LL_LPTIM_CLK_FILTER_NONE 00851 * @arg @ref LL_LPTIM_CLK_FILTER_2 00852 * @arg @ref LL_LPTIM_CLK_FILTER_4 00853 * @arg @ref LL_LPTIM_CLK_FILTER_8 00854 */ 00855 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx) 00856 { 00857 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT)); 00858 } 00859 00860 /** 00861 * @} 00862 */ 00863 00864 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode 00865 * @{ 00866 */ 00867 00868 /** 00869 * @brief Configure the encoder mode. 00870 * @note This function must be called when the LPTIM instance is disabled. 00871 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode 00872 * @param LPTIMx Low-Power Timer instance 00873 * @param EncoderMode This parameter can be one of the following values: 00874 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING 00875 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING 00876 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING 00877 * @retval None 00878 */ 00879 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode) 00880 { 00881 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode); 00882 } 00883 00884 /** 00885 * @brief Get actual encoder mode. 00886 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode 00887 * @param LPTIMx Low-Power Timer instance 00888 * @retval Returned value can be one of the following values: 00889 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING 00890 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING 00891 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING 00892 */ 00893 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx) 00894 { 00895 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL)); 00896 } 00897 00898 /** 00899 * @brief Enable the encoder mode 00900 * @note This function must be called when the LPTIM instance is disabled. 00901 * @note In this mode the LPTIM instance must be clocked by an internal clock 00902 * source. Also, the prescaler division ratio must be equal to 1. 00903 * @note LPTIM instance must be configured in continuous mode prior enabling 00904 * the encoder mode. 00905 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode 00906 * @param LPTIMx Low-Power Timer instance 00907 * @retval None 00908 */ 00909 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx) 00910 { 00911 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC); 00912 } 00913 00914 /** 00915 * @brief Disable the encoder mode 00916 * @note This function must be called when the LPTIM instance is disabled. 00917 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode 00918 * @param LPTIMx Low-Power Timer instance 00919 * @retval None 00920 */ 00921 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx) 00922 { 00923 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC); 00924 } 00925 00926 /** 00927 * @brief Indicates whether the LPTIM operates in encoder mode. 00928 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode 00929 * @param LPTIMx Low-Power Timer instance 00930 * @retval State of bit (1 or 0). 00931 */ 00932 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx) 00933 { 00934 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC)); 00935 } 00936 00937 /** 00938 * @} 00939 */ 00940 00941 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management 00942 * @{ 00943 */ 00944 00945 /** 00946 * @brief Clear the compare match flag (CMPMCF) 00947 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM 00948 * @param LPTIMx Low-Power Timer instance 00949 * @retval None 00950 */ 00951 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx) 00952 { 00953 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF); 00954 } 00955 00956 /** 00957 * @brief Inform application whether a compare match interrupt has occurred. 00958 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM 00959 * @param LPTIMx Low-Power Timer instance 00960 * @retval State of bit (1 or 0). 00961 */ 00962 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx) 00963 { 00964 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM)); 00965 } 00966 00967 /** 00968 * @brief Clear the autoreload match flag (ARRMCF) 00969 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM 00970 * @param LPTIMx Low-Power Timer instance 00971 * @retval None 00972 */ 00973 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) 00974 { 00975 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF); 00976 } 00977 00978 /** 00979 * @brief Inform application whether a autoreload match interrupt has occured. 00980 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM 00981 * @param LPTIMx Low-Power Timer instance 00982 * @retval State of bit (1 or 0). 00983 */ 00984 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx) 00985 { 00986 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM)); 00987 } 00988 00989 /** 00990 * @brief Clear the external trigger valid edge flag(EXTTRIGCF). 00991 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG 00992 * @param LPTIMx Low-Power Timer instance 00993 * @retval None 00994 */ 00995 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx) 00996 { 00997 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF); 00998 } 00999 01000 /** 01001 * @brief Inform application whether a valid edge on the selected external trigger input has occurred. 01002 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG 01003 * @param LPTIMx Low-Power Timer instance 01004 * @retval State of bit (1 or 0). 01005 */ 01006 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx) 01007 { 01008 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG)); 01009 } 01010 01011 /** 01012 * @brief Clear the compare register update interrupt flag (CMPOKCF). 01013 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK 01014 * @param LPTIMx Low-Power Timer instance 01015 * @retval None 01016 */ 01017 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx) 01018 { 01019 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF); 01020 } 01021 01022 /** 01023 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated. 01024 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK 01025 * @param LPTIMx Low-Power Timer instance 01026 * @retval State of bit (1 or 0). 01027 */ 01028 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx) 01029 { 01030 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK)); 01031 } 01032 01033 /** 01034 * @brief Clear the autoreload register update interrupt flag (ARROKCF). 01035 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK 01036 * @param LPTIMx Low-Power Timer instance 01037 * @retval None 01038 */ 01039 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx) 01040 { 01041 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF); 01042 } 01043 01044 /** 01045 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated. 01046 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK 01047 * @param LPTIMx Low-Power Timer instance 01048 * @retval State of bit (1 or 0). 01049 */ 01050 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx) 01051 { 01052 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK)); 01053 } 01054 01055 /** 01056 * @brief Clear the counter direction change to up interrupt flag (UPCF). 01057 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP 01058 * @param LPTIMx Low-Power Timer instance 01059 * @retval None 01060 */ 01061 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx) 01062 { 01063 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF); 01064 } 01065 01066 /** 01067 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode). 01068 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP 01069 * @param LPTIMx Low-Power Timer instance 01070 * @retval State of bit (1 or 0). 01071 */ 01072 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx) 01073 { 01074 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP)); 01075 } 01076 01077 /** 01078 * @brief Clear the counter direction change to down interrupt flag (DOWNCF). 01079 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN 01080 * @param LPTIMx Low-Power Timer instance 01081 * @retval None 01082 */ 01083 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx) 01084 { 01085 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF); 01086 } 01087 01088 /** 01089 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode). 01090 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN 01091 * @param LPTIMx Low-Power Timer instance 01092 * @retval State of bit (1 or 0). 01093 */ 01094 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx) 01095 { 01096 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN)); 01097 } 01098 01099 /** 01100 * @} 01101 */ 01102 01103 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management 01104 * @{ 01105 */ 01106 01107 /** 01108 * @brief Enable compare match interrupt (CMPMIE). 01109 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM 01110 * @param LPTIMx Low-Power Timer instance 01111 * @retval None 01112 */ 01113 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx) 01114 { 01115 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE); 01116 } 01117 01118 /** 01119 * @brief Disable compare match interrupt (CMPMIE). 01120 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM 01121 * @param LPTIMx Low-Power Timer instance 01122 * @retval None 01123 */ 01124 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx) 01125 { 01126 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE); 01127 } 01128 01129 /** 01130 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled. 01131 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM 01132 * @param LPTIMx Low-Power Timer instance 01133 * @retval State of bit (1 or 0). 01134 */ 01135 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx) 01136 { 01137 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE)); 01138 } 01139 01140 /** 01141 * @brief Enable autoreload match interrupt (ARRMIE). 01142 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM 01143 * @param LPTIMx Low-Power Timer instance 01144 * @retval None 01145 */ 01146 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx) 01147 { 01148 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE); 01149 } 01150 01151 /** 01152 * @brief Disable autoreload match interrupt (ARRMIE). 01153 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM 01154 * @param LPTIMx Low-Power Timer instance 01155 * @retval None 01156 */ 01157 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx) 01158 { 01159 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE); 01160 } 01161 01162 /** 01163 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled. 01164 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM 01165 * @param LPTIMx Low-Power Timer instance 01166 * @retval State of bit (1 or 0). 01167 */ 01168 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx) 01169 { 01170 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE)); 01171 } 01172 01173 /** 01174 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE). 01175 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG 01176 * @param LPTIMx Low-Power Timer instance 01177 * @retval None 01178 */ 01179 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) 01180 { 01181 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE); 01182 } 01183 01184 /** 01185 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE). 01186 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG 01187 * @param LPTIMx Low-Power Timer instance 01188 * @retval None 01189 */ 01190 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) 01191 { 01192 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE); 01193 } 01194 01195 /** 01196 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled. 01197 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG 01198 * @param LPTIMx Low-Power Timer instance 01199 * @retval State of bit (1 or 0). 01200 */ 01201 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) 01202 { 01203 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE)); 01204 } 01205 01206 /** 01207 * @brief Enable compare register write completed interrupt (CMPOKIE). 01208 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK 01209 * @param LPTIMx Low-Power Timer instance 01210 * @retval None 01211 */ 01212 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx) 01213 { 01214 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE); 01215 } 01216 01217 /** 01218 * @brief Disable compare register write completed interrupt (CMPOKIE). 01219 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK 01220 * @param LPTIMx Low-Power Timer instance 01221 * @retval None 01222 */ 01223 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx) 01224 { 01225 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE); 01226 } 01227 01228 /** 01229 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled. 01230 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK 01231 * @param LPTIMx Low-Power Timer instance 01232 * @retval State of bit (1 or 0). 01233 */ 01234 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx) 01235 { 01236 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE)); 01237 } 01238 01239 /** 01240 * @brief Enable autoreload register write completed interrupt (ARROKIE). 01241 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK 01242 * @param LPTIMx Low-Power Timer instance 01243 * @retval None 01244 */ 01245 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx) 01246 { 01247 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE); 01248 } 01249 01250 /** 01251 * @brief Disable autoreload register write completed interrupt (ARROKIE). 01252 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK 01253 * @param LPTIMx Low-Power Timer instance 01254 * @retval None 01255 */ 01256 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx) 01257 { 01258 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE); 01259 } 01260 01261 /** 01262 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled. 01263 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK 01264 * @param LPTIMx Low-Power Timer instance 01265 * @retval State of bit (1 or 0). 01266 */ 01267 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx) 01268 { 01269 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE)); 01270 } 01271 01272 /** 01273 * @brief Enable direction change to up interrupt (UPIE). 01274 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP 01275 * @param LPTIMx Low-Power Timer instance 01276 * @retval None 01277 */ 01278 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx) 01279 { 01280 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE); 01281 } 01282 01283 /** 01284 * @brief Disable direction change to up interrupt (UPIE). 01285 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP 01286 * @param LPTIMx Low-Power Timer instance 01287 * @retval None 01288 */ 01289 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx) 01290 { 01291 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE); 01292 } 01293 01294 /** 01295 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled. 01296 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP 01297 * @param LPTIMx Low-Power Timer instance 01298 * @retval State of bit (1 or 0). 01299 */ 01300 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx) 01301 { 01302 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE)); 01303 } 01304 01305 /** 01306 * @brief Enable direction change to down interrupt (DOWNIE). 01307 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN 01308 * @param LPTIMx Low-Power Timer instance 01309 * @retval None 01310 */ 01311 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx) 01312 { 01313 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE); 01314 } 01315 01316 /** 01317 * @brief Disable direction change to down interrupt (DOWNIE). 01318 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN 01319 * @param LPTIMx Low-Power Timer instance 01320 * @retval None 01321 */ 01322 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx) 01323 { 01324 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE); 01325 } 01326 01327 /** 01328 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled. 01329 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN 01330 * @param LPTIMx Low-Power Timer instance 01331 * @retval State of bit (1 or 0). 01332 */ 01333 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx) 01334 { 01335 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE)); 01336 } 01337 01338 /** 01339 * @} 01340 */ 01341 01342 #if defined(USE_FULL_LL_DRIVER) 01343 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions 01344 * @{ 01345 */ 01346 01347 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx); 01348 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct); 01349 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct); 01350 /** 01351 * @} 01352 */ 01353 #endif /* USE_FULL_LL_DRIVER */ 01354 01355 /** 01356 * @} 01357 */ 01358 01359 /** 01360 * @} 01361 */ 01362 01363 #endif /* LPTIM1 */ 01364 01365 /** 01366 * @} 01367 */ 01368 01369 #ifdef __cplusplus 01370 } 01371 #endif 01372 01373 #endif /* __STM32F4xx_LL_LPTIM_H */ 01374 01375 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/