STM32F439xx HAL User Manual
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Header file of DMA LL module. More...
#include "stm32f4xx.h"
Go to the source code of this file.
Data Structures | |
struct | LL_DMA_InitTypeDef |
Defines | |
#define | LL_DMA_STREAM_0 0x00000000U |
#define | LL_DMA_STREAM_1 0x00000001U |
#define | LL_DMA_STREAM_2 0x00000002U |
#define | LL_DMA_STREAM_3 0x00000003U |
#define | LL_DMA_STREAM_4 0x00000004U |
#define | LL_DMA_STREAM_5 0x00000005U |
#define | LL_DMA_STREAM_6 0x00000006U |
#define | LL_DMA_STREAM_7 0x00000007U |
#define | LL_DMA_STREAM_ALL 0xFFFF0000U |
#define | LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U |
#define | LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 |
#define | LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 |
#define | LL_DMA_MODE_NORMAL 0x00000000U |
#define | LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC |
#define | LL_DMA_MODE_PFCTRL DMA_SxCR_PFCTRL |
#define | LL_DMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U |
#define | LL_DMA_DOUBLEBUFFER_MODE_ENABLE DMA_SxCR_DBM |
#define | LL_DMA_PERIPH_NOINCREMENT 0x00000000U |
#define | LL_DMA_PERIPH_INCREMENT DMA_SxCR_PINC |
#define | LL_DMA_MEMORY_NOINCREMENT 0x00000000U |
#define | LL_DMA_MEMORY_INCREMENT DMA_SxCR_MINC |
#define | LL_DMA_PDATAALIGN_BYTE 0x00000000U |
#define | LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 |
#define | LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 |
#define | LL_DMA_MDATAALIGN_BYTE 0x00000000U |
#define | LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 |
#define | LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 |
#define | LL_DMA_OFFSETSIZE_PSIZE 0x00000000U |
#define | LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS |
#define | LL_DMA_PRIORITY_LOW 0x00000000U |
#define | LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 |
#define | LL_DMA_PRIORITY_HIGH DMA_SxCR_PL_1 |
#define | LL_DMA_PRIORITY_VERYHIGH DMA_SxCR_PL |
#define | LL_DMA_CHANNEL_0 0x00000000U /* Select Channel0 of DMA Instance */ |
#define | LL_DMA_CHANNEL_1 DMA_SxCR_CHSEL_0 /* Select Channel1 of DMA Instance */ |
#define | LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1 /* Select Channel2 of DMA Instance */ |
#define | LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) /* Select Channel3 of DMA Instance */ |
#define | LL_DMA_CHANNEL_4 DMA_SxCR_CHSEL_2 /* Select Channel4 of DMA Instance */ |
#define | LL_DMA_CHANNEL_5 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) /* Select Channel5 of DMA Instance */ |
#define | LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) /* Select Channel6 of DMA Instance */ |
#define | LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel7 of DMA Instance */ |
#define | LL_DMA_MBURST_SINGLE 0x00000000U |
#define | LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 |
#define | LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 |
#define | LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) |
#define | LL_DMA_PBURST_SINGLE 0x00000000U |
#define | LL_DMA_PBURST_INC4 DMA_SxCR_PBURST_0 |
#define | LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 |
#define | LL_DMA_PBURST_INC16 (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) |
#define | LL_DMA_FIFOMODE_DISABLE 0x00000000U |
#define | LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS |
#define | LL_DMA_FIFOSTATUS_0_25 0x00000000U |
#define | LL_DMA_FIFOSTATUS_25_50 DMA_SxFCR_FS_0 |
#define | LL_DMA_FIFOSTATUS_50_75 DMA_SxFCR_FS_1 |
#define | LL_DMA_FIFOSTATUS_75_100 (DMA_SxFCR_FS_1 | DMA_SxFCR_FS_0) |
#define | LL_DMA_FIFOSTATUS_EMPTY DMA_SxFCR_FS_2 |
#define | LL_DMA_FIFOSTATUS_FULL (DMA_SxFCR_FS_2 | DMA_SxFCR_FS_0) |
#define | LL_DMA_FIFOTHRESHOLD_1_4 0x00000000U |
#define | LL_DMA_FIFOTHRESHOLD_1_2 DMA_SxFCR_FTH_0 |
#define | LL_DMA_FIFOTHRESHOLD_3_4 DMA_SxFCR_FTH_1 |
#define | LL_DMA_FIFOTHRESHOLD_FULL DMA_SxFCR_FTH |
#define | LL_DMA_CURRENTTARGETMEM0 0x00000000U |
#define | LL_DMA_CURRENTTARGETMEM1 DMA_SxCR_CT |
#define | LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
Write a value in DMA register. | |
#define | LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
Read a value in DMA register. | |
#define | __LL_DMA_GET_INSTANCE(__STREAM_INSTANCE__) (((uint32_t)(__STREAM_INSTANCE__) > ((uint32_t)DMA1_Stream7)) ? DMA2 : DMA1) |
Convert DMAx_Streamy into DMAx. | |
#define | __LL_DMA_GET_STREAM(__STREAM_INSTANCE__) |
Convert DMAx_Streamy into LL_DMA_STREAM_y. | |
#define | __LL_DMA_GET_STREAM_INSTANCE(__DMA_INSTANCE__, __STREAM__) |
Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy. | |
Functions | |
__STATIC_INLINE void | LL_DMA_EnableStream (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable DMA stream. | |
__STATIC_INLINE void | LL_DMA_DisableStream (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable DMA stream. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledStream (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if DMA stream is enabled or disabled. | |
__STATIC_INLINE void | LL_DMA_ConfigTransfer (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Configuration) |
Configure all parameters linked to DMA transfer. | |
__STATIC_INLINE void | LL_DMA_SetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Direction) |
Set Data transfer direction (read from peripheral or from memory). | |
__STATIC_INLINE uint32_t | LL_DMA_GetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Data transfer direction (read from peripheral or from memory). | |
__STATIC_INLINE void | LL_DMA_SetMode (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mode) |
Set DMA mode normal, circular or peripheral flow control. | |
__STATIC_INLINE uint32_t | LL_DMA_GetMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Get DMA mode normal, circular or peripheral flow control. | |
__STATIC_INLINE void | LL_DMA_SetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t IncrementMode) |
Set Peripheral increment mode. | |
__STATIC_INLINE uint32_t | LL_DMA_GetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Peripheral increment mode. | |
__STATIC_INLINE void | LL_DMA_SetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t IncrementMode) |
Set Memory increment mode. | |
__STATIC_INLINE uint32_t | LL_DMA_GetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Memory increment mode. | |
__STATIC_INLINE void | LL_DMA_SetPeriphSize (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) |
Set Peripheral size. | |
__STATIC_INLINE uint32_t | LL_DMA_GetPeriphSize (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Peripheral size. | |
__STATIC_INLINE void | LL_DMA_SetMemorySize (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) |
Set Memory size. | |
__STATIC_INLINE uint32_t | LL_DMA_GetMemorySize (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Memory size. | |
__STATIC_INLINE void | LL_DMA_SetIncOffsetSize (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t OffsetSize) |
Set Peripheral increment offset size. | |
__STATIC_INLINE uint32_t | LL_DMA_GetIncOffsetSize (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Peripheral increment offset size. | |
__STATIC_INLINE void | LL_DMA_SetStreamPriorityLevel (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Priority) |
Set Stream priority level. | |
__STATIC_INLINE uint32_t | LL_DMA_GetStreamPriorityLevel (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Stream priority level. | |
__STATIC_INLINE void | LL_DMA_SetDataLength (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t NbData) |
Set Number of data to transfer. | |
__STATIC_INLINE uint32_t | LL_DMA_GetDataLength (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Number of data to transfer. | |
__STATIC_INLINE void | LL_DMA_SetChannelSelection (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channel) |
Select Channel number associated to the Stream. | |
__STATIC_INLINE uint32_t | LL_DMA_GetChannelSelection (DMA_TypeDef *DMAx, uint32_t Stream) |
Get the Channel number associated to the Stream. | |
__STATIC_INLINE void | LL_DMA_SetMemoryBurstxfer (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mburst) |
Set Memory burst transfer configuration. | |
__STATIC_INLINE uint32_t | LL_DMA_GetMemoryBurstxfer (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Memory burst transfer configuration. | |
__STATIC_INLINE void | LL_DMA_SetPeriphBurstxfer (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Pburst) |
Set Peripheral burst transfer configuration. | |
__STATIC_INLINE uint32_t | LL_DMA_GetPeriphBurstxfer (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Peripheral burst transfer configuration. | |
__STATIC_INLINE void | LL_DMA_SetCurrentTargetMem (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t CurrentMemory) |
Set Current target (only in double buffer mode) to Memory 1 or Memory 0. | |
__STATIC_INLINE uint32_t | LL_DMA_GetCurrentTargetMem (DMA_TypeDef *DMAx, uint32_t Stream) |
Set Current target (only in double buffer mode) to Memory 1 or Memory 0. | |
__STATIC_INLINE void | LL_DMA_EnableDoubleBufferMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable the double buffer mode. | |
__STATIC_INLINE void | LL_DMA_DisableDoubleBufferMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable the double buffer mode. | |
__STATIC_INLINE uint32_t | LL_DMA_GetFIFOStatus (DMA_TypeDef *DMAx, uint32_t Stream) |
Get FIFO status. | |
__STATIC_INLINE void | LL_DMA_DisableFifoMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable Fifo mode. | |
__STATIC_INLINE void | LL_DMA_EnableFifoMode (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable Fifo mode. | |
__STATIC_INLINE void | LL_DMA_SetFIFOThreshold (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold) |
Select FIFO threshold. | |
__STATIC_INLINE uint32_t | LL_DMA_GetFIFOThreshold (DMA_TypeDef *DMAx, uint32_t Stream) |
Get FIFO threshold. | |
__STATIC_INLINE void | LL_DMA_ConfigFifo (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint32_t FifoThreshold) |
Configure the FIFO . | |
__STATIC_INLINE void | LL_DMA_ConfigAddresses (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction) |
Configure the Source and Destination addresses. | |
__STATIC_INLINE void | LL_DMA_SetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t MemoryAddress) |
Set the Memory address. | |
__STATIC_INLINE void | LL_DMA_SetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t PeriphAddress) |
Set the Peripheral address. | |
__STATIC_INLINE uint32_t | LL_DMA_GetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Stream) |
Get the Memory address. | |
__STATIC_INLINE uint32_t | LL_DMA_GetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Stream) |
Get the Peripheral address. | |
__STATIC_INLINE void | LL_DMA_SetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t MemoryAddress) |
Set the Memory to Memory Source address. | |
__STATIC_INLINE void | LL_DMA_SetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t MemoryAddress) |
Set the Memory to Memory Destination address. | |
__STATIC_INLINE uint32_t | LL_DMA_GetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Stream) |
Get the Memory to Memory Source address. | |
__STATIC_INLINE uint32_t | LL_DMA_GetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Stream) |
Get the Memory to Memory Destination address. | |
__STATIC_INLINE void | LL_DMA_SetMemory1Address (DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) |
Set Memory 1 address (used in case of Double buffer mode). | |
__STATIC_INLINE uint32_t | LL_DMA_GetMemory1Address (DMA_TypeDef *DMAx, uint32_t Stream) |
Get Memory 1 address (used in case of Double buffer mode). | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT0 (DMA_TypeDef *DMAx) |
Get Stream 0 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT1 (DMA_TypeDef *DMAx) |
Get Stream 1 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT2 (DMA_TypeDef *DMAx) |
Get Stream 2 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT3 (DMA_TypeDef *DMAx) |
Get Stream 3 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT4 (DMA_TypeDef *DMAx) |
Get Stream 4 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT5 (DMA_TypeDef *DMAx) |
Get Stream 5 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT6 (DMA_TypeDef *DMAx) |
Get Stream 6 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT7 (DMA_TypeDef *DMAx) |
Get Stream 7 half transfer flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC0 (DMA_TypeDef *DMAx) |
Get Stream 0 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC1 (DMA_TypeDef *DMAx) |
Get Stream 1 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC2 (DMA_TypeDef *DMAx) |
Get Stream 2 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC3 (DMA_TypeDef *DMAx) |
Get Stream 3 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC4 (DMA_TypeDef *DMAx) |
Get Stream 4 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC5 (DMA_TypeDef *DMAx) |
Get Stream 5 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC6 (DMA_TypeDef *DMAx) |
Get Stream 6 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC7 (DMA_TypeDef *DMAx) |
Get Stream 7 transfer complete flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE0 (DMA_TypeDef *DMAx) |
Get Stream 0 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE1 (DMA_TypeDef *DMAx) |
Get Stream 1 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE2 (DMA_TypeDef *DMAx) |
Get Stream 2 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE3 (DMA_TypeDef *DMAx) |
Get Stream 3 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE4 (DMA_TypeDef *DMAx) |
Get Stream 4 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE5 (DMA_TypeDef *DMAx) |
Get Stream 5 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE6 (DMA_TypeDef *DMAx) |
Get Stream 6 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE7 (DMA_TypeDef *DMAx) |
Get Stream 7 transfer error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME0 (DMA_TypeDef *DMAx) |
Get Stream 0 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME1 (DMA_TypeDef *DMAx) |
Get Stream 1 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME2 (DMA_TypeDef *DMAx) |
Get Stream 2 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME3 (DMA_TypeDef *DMAx) |
Get Stream 3 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME4 (DMA_TypeDef *DMAx) |
Get Stream 4 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME5 (DMA_TypeDef *DMAx) |
Get Stream 5 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME6 (DMA_TypeDef *DMAx) |
Get Stream 6 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_DME7 (DMA_TypeDef *DMAx) |
Get Stream 7 direct mode error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE0 (DMA_TypeDef *DMAx) |
Get Stream 0 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE1 (DMA_TypeDef *DMAx) |
Get Stream 1 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE2 (DMA_TypeDef *DMAx) |
Get Stream 2 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE3 (DMA_TypeDef *DMAx) |
Get Stream 3 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE4 (DMA_TypeDef *DMAx) |
Get Stream 4 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE5 (DMA_TypeDef *DMAx) |
Get Stream 5 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE6 (DMA_TypeDef *DMAx) |
Get Stream 6 FIFO error flag. | |
__STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_FE7 (DMA_TypeDef *DMAx) |
Get Stream 7 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT0 (DMA_TypeDef *DMAx) |
Clear Stream 0 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT1 (DMA_TypeDef *DMAx) |
Clear Stream 1 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT2 (DMA_TypeDef *DMAx) |
Clear Stream 2 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT3 (DMA_TypeDef *DMAx) |
Clear Stream 3 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT4 (DMA_TypeDef *DMAx) |
Clear Stream 4 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT5 (DMA_TypeDef *DMAx) |
Clear Stream 5 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT6 (DMA_TypeDef *DMAx) |
Clear Stream 6 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_HT7 (DMA_TypeDef *DMAx) |
Clear Stream 7 half transfer flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC0 (DMA_TypeDef *DMAx) |
Clear Stream 0 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC1 (DMA_TypeDef *DMAx) |
Clear Stream 1 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC2 (DMA_TypeDef *DMAx) |
Clear Stream 2 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC3 (DMA_TypeDef *DMAx) |
Clear Stream 3 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC4 (DMA_TypeDef *DMAx) |
Clear Stream 4 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC5 (DMA_TypeDef *DMAx) |
Clear Stream 5 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC6 (DMA_TypeDef *DMAx) |
Clear Stream 6 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TC7 (DMA_TypeDef *DMAx) |
Clear Stream 7 transfer complete flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE0 (DMA_TypeDef *DMAx) |
Clear Stream 0 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE1 (DMA_TypeDef *DMAx) |
Clear Stream 1 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE2 (DMA_TypeDef *DMAx) |
Clear Stream 2 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE3 (DMA_TypeDef *DMAx) |
Clear Stream 3 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE4 (DMA_TypeDef *DMAx) |
Clear Stream 4 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE5 (DMA_TypeDef *DMAx) |
Clear Stream 5 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE6 (DMA_TypeDef *DMAx) |
Clear Stream 6 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_TE7 (DMA_TypeDef *DMAx) |
Clear Stream 7 transfer error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME0 (DMA_TypeDef *DMAx) |
Clear Stream 0 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME1 (DMA_TypeDef *DMAx) |
Clear Stream 1 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME2 (DMA_TypeDef *DMAx) |
Clear Stream 2 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME3 (DMA_TypeDef *DMAx) |
Clear Stream 3 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME4 (DMA_TypeDef *DMAx) |
Clear Stream 4 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME5 (DMA_TypeDef *DMAx) |
Clear Stream 5 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME6 (DMA_TypeDef *DMAx) |
Clear Stream 6 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_DME7 (DMA_TypeDef *DMAx) |
Clear Stream 7 direct mode error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE0 (DMA_TypeDef *DMAx) |
Clear Stream 0 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE1 (DMA_TypeDef *DMAx) |
Clear Stream 1 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE2 (DMA_TypeDef *DMAx) |
Clear Stream 2 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE3 (DMA_TypeDef *DMAx) |
Clear Stream 3 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE4 (DMA_TypeDef *DMAx) |
Clear Stream 4 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE5 (DMA_TypeDef *DMAx) |
Clear Stream 5 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE6 (DMA_TypeDef *DMAx) |
Clear Stream 6 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_ClearFlag_FE7 (DMA_TypeDef *DMAx) |
Clear Stream 7 FIFO error flag. | |
__STATIC_INLINE void | LL_DMA_EnableIT_HT (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable Half transfer interrupt. | |
__STATIC_INLINE void | LL_DMA_EnableIT_TE (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable Transfer error interrupt. | |
__STATIC_INLINE void | LL_DMA_EnableIT_TC (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable Transfer complete interrupt. | |
__STATIC_INLINE void | LL_DMA_EnableIT_DME (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable Direct mode error interrupt. | |
__STATIC_INLINE void | LL_DMA_EnableIT_FE (DMA_TypeDef *DMAx, uint32_t Stream) |
Enable FIFO error interrupt. | |
__STATIC_INLINE void | LL_DMA_DisableIT_HT (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable Half transfer interrupt. | |
__STATIC_INLINE void | LL_DMA_DisableIT_TE (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable Transfer error interrupt. | |
__STATIC_INLINE void | LL_DMA_DisableIT_TC (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable Transfer complete interrupt. | |
__STATIC_INLINE void | LL_DMA_DisableIT_DME (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable Direct mode error interrupt. | |
__STATIC_INLINE void | LL_DMA_DisableIT_FE (DMA_TypeDef *DMAx, uint32_t Stream) |
Disable FIFO error interrupt. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_HT (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if Half transfer interrup is enabled. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_TE (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if Transfer error nterrup is enabled. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_TC (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if Transfer complete interrup is enabled. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_DME (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if Direct mode error interrupt is enabled. | |
__STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_FE (DMA_TypeDef *DMAx, uint32_t Stream) |
Check if FIFO error interrup is enabled. | |
uint32_t | LL_DMA_Init (DMA_TypeDef *DMAx, uint32_t Stream, LL_DMA_InitTypeDef *DMA_InitStruct) |
Initialize the DMA registers according to the specified parameters in DMA_InitStruct. | |
uint32_t | LL_DMA_DeInit (DMA_TypeDef *DMAx, uint32_t Stream) |
De-initialize the DMA registers to their default reset values. | |
void | LL_DMA_StructInit (LL_DMA_InitTypeDef *DMA_InitStruct) |
Set each LL_DMA_InitTypeDef field to default value. | |
Variables | |
static const uint8_t | STREAM_OFFSET_TAB [] |
Header file of DMA LL module.
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Definition in file stm32f4xx_ll_dma.h.