STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_ll_dma2d.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMA2D LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_LL_DMA2D_H 00038 #define __STM32F4xx_LL_DMA2D_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32f4xx.h" 00046 00047 /** @addtogroup STM32F4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (DMA2D) 00052 00053 /** @defgroup DMA2D_LL DMA2D 00054 * @{ 00055 */ 00056 00057 /* Private types -------------------------------------------------------------*/ 00058 /* Private variables ---------------------------------------------------------*/ 00059 /* Private constants ---------------------------------------------------------*/ 00060 /* Private macros ------------------------------------------------------------*/ 00061 #if defined(USE_FULL_LL_DRIVER) 00062 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros 00063 * @{ 00064 */ 00065 00066 /** 00067 * @} 00068 */ 00069 #endif /*USE_FULL_LL_DRIVER*/ 00070 00071 /* Exported types ------------------------------------------------------------*/ 00072 #if defined(USE_FULL_LL_DRIVER) 00073 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures 00074 * @{ 00075 */ 00076 00077 /** 00078 * @brief LL DMA2D Init Structure Definition 00079 */ 00080 typedef struct 00081 { 00082 uint32_t Mode; /*!< Specifies the DMA2D transfer mode. 00083 - This parameter can be one value of @ref DMA2D_LL_EC_MODE. 00084 00085 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/ 00086 00087 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00088 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00089 00090 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00091 00092 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00093 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00094 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00095 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00096 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00097 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00098 00099 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00100 function @ref LL_DMA2D_ConfigOutputColor(). */ 00101 00102 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00103 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00104 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00105 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00106 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00107 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00108 00109 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00110 function @ref LL_DMA2D_ConfigOutputColor(). */ 00111 00112 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00113 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00114 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00115 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00116 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00117 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00118 00119 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00120 function @ref LL_DMA2D_ConfigOutputColor(). */ 00121 00122 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00123 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00124 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00125 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00126 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00127 00128 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00129 function @ref LL_DMA2D_ConfigOutputColor(). */ 00130 00131 uint32_t OutputMemoryAddress; /*!< Specifies the memory address. 00132 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00133 00134 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ 00135 00136 uint32_t LineOffset; /*!< Specifies the output line offset value. 00137 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00138 00139 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */ 00140 00141 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. 00142 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. 00143 00144 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ 00145 00146 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered. 00147 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00148 00149 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ 00150 00151 } LL_DMA2D_InitTypeDef; 00152 00153 /** 00154 * @brief LL DMA2D Layer Configuration Structure Definition 00155 */ 00156 typedef struct 00157 { 00158 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. 00159 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00160 00161 This parameter can be modified afterwards using unitary functions 00162 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, 00163 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ 00164 00165 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. 00166 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00167 00168 This parameter can be modified afterwards using unitary functions 00169 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, 00170 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ 00171 00172 uint32_t ColorMode; /*!< Specifies the foreground or background color mode. 00173 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. 00174 00175 This parameter can be modified afterwards using unitary functions 00176 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, 00177 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ 00178 00179 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. 00180 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. 00181 00182 This parameter can be modified afterwards using unitary functions 00183 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, 00184 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ 00185 00186 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. 00187 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00188 00189 This parameter can be modified afterwards using unitary functions 00190 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, 00191 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ 00192 00193 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. 00194 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. 00195 00196 This parameter can be modified afterwards using unitary functions 00197 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, 00198 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ 00199 00200 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. 00201 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00202 00203 This parameter can be modified afterwards using unitary functions 00204 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, 00205 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ 00206 00207 uint32_t Blue; /*!< Specifies the foreground or background Blue color value. 00208 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00209 00210 This parameter can be modified afterwards using unitary functions 00211 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, 00212 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ 00213 00214 uint32_t Green; /*!< Specifies the foreground or background Green color value. 00215 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00216 00217 This parameter can be modified afterwards using unitary functions 00218 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, 00219 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ 00220 00221 uint32_t Red; /*!< Specifies the foreground or background Red color value. 00222 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00223 00224 This parameter can be modified afterwards using unitary functions 00225 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, 00226 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ 00227 00228 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. 00229 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00230 00231 This parameter can be modified afterwards using unitary functions 00232 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, 00233 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ 00234 00235 } LL_DMA2D_LayerCfgTypeDef; 00236 00237 /** 00238 * @brief LL DMA2D Output Color Structure Definition 00239 */ 00240 typedef struct 00241 { 00242 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00243 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00244 00245 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00246 00247 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00248 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00249 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00250 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00251 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00252 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00253 00254 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00255 function @ref LL_DMA2D_ConfigOutputColor(). */ 00256 00257 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00258 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00259 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00260 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00261 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00262 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00263 00264 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00265 function @ref LL_DMA2D_ConfigOutputColor(). */ 00266 00267 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00268 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00269 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00270 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00271 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00272 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00273 00274 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00275 function @ref LL_DMA2D_ConfigOutputColor(). */ 00276 00277 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00278 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00279 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00280 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00281 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00282 00283 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00284 function @ref LL_DMA2D_ConfigOutputColor(). */ 00285 00286 } LL_DMA2D_ColorTypeDef; 00287 00288 /** 00289 * @} 00290 */ 00291 #endif /* USE_FULL_LL_DRIVER */ 00292 00293 /* Exported constants --------------------------------------------------------*/ 00294 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants 00295 * @{ 00296 */ 00297 00298 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines 00299 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function 00300 * @{ 00301 */ 00302 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ 00303 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ 00304 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ 00305 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ 00306 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ 00307 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ 00308 /** 00309 * @} 00310 */ 00311 00312 /** @defgroup DMA2D_LL_EC_IT IT Defines 00313 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions 00314 * @{ 00315 */ 00316 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ 00317 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ 00318 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ 00319 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ 00320 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ 00321 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ 00322 /** 00323 * @} 00324 */ 00325 00326 /** @defgroup DMA2D_LL_EC_MODE Mode 00327 * @{ 00328 */ 00329 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ 00330 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ 00331 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ 00332 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */ 00333 /** 00334 * @} 00335 */ 00336 00337 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode 00338 * @{ 00339 */ 00340 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00341 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ 00342 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ 00343 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ 00344 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ 00345 /** 00346 * @} 00347 */ 00348 00349 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode 00350 * @{ 00351 */ 00352 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00353 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ 00354 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ 00355 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ 00356 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ 00357 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ 00358 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ 00359 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ 00360 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ 00361 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ 00362 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ 00363 /** 00364 * @} 00365 */ 00366 00367 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode 00368 * @{ 00369 */ 00370 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ 00371 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */ 00372 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value 00373 with original alpha channel value */ 00374 /** 00375 * @} 00376 */ 00377 00378 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode 00379 * @{ 00380 */ 00381 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00382 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ 00383 /** 00384 * @} 00385 */ 00386 00387 /** 00388 * @} 00389 */ 00390 00391 /* Exported macro ------------------------------------------------------------*/ 00392 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros 00393 * @{ 00394 */ 00395 00396 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros 00397 * @{ 00398 */ 00399 00400 /** 00401 * @brief Write a value in DMA2D register. 00402 * @param __INSTANCE__ DMA2D Instance 00403 * @param __REG__ Register to be written 00404 * @param __VALUE__ Value to be written in the register 00405 * @retval None 00406 */ 00407 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00408 00409 /** 00410 * @brief Read a value in DMA2D register. 00411 * @param __INSTANCE__ DMA2D Instance 00412 * @param __REG__ Register to be read 00413 * @retval Register value 00414 */ 00415 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00416 /** 00417 * @} 00418 */ 00419 00420 /** 00421 * @} 00422 */ 00423 00424 /* Exported functions --------------------------------------------------------*/ 00425 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions 00426 * @{ 00427 */ 00428 00429 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions 00430 * @{ 00431 */ 00432 00433 /** 00434 * @brief Start a DMA2D transfer. 00435 * @rmtoll CR START LL_DMA2D_Start 00436 * @param DMA2Dx DMA2D Instance 00437 * @retval None 00438 */ 00439 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) 00440 { 00441 SET_BIT(DMA2Dx->CR, DMA2D_CR_START); 00442 } 00443 00444 /** 00445 * @brief Indicate if a DMA2D transfer is ongoing. 00446 * @rmtoll CR START LL_DMA2D_IsTransferOngoing 00447 * @param DMA2Dx DMA2D Instance 00448 * @retval State of bit (1 or 0). 00449 */ 00450 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) 00451 { 00452 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)); 00453 } 00454 00455 /** 00456 * @brief Suspend DMA2D transfer. 00457 * @note This API can be used to suspend automatic foreground or background CLUT loading. 00458 * @rmtoll CR SUSP LL_DMA2D_Suspend 00459 * @param DMA2Dx DMA2D Instance 00460 * @retval None 00461 */ 00462 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) 00463 { 00464 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); 00465 } 00466 00467 /** 00468 * @brief Resume DMA2D transfer. 00469 * @note This API can be used to resume automatic foreground or background CLUT loading. 00470 * @rmtoll CR SUSP LL_DMA2D_Resume 00471 * @param DMA2Dx DMA2D Instance 00472 * @retval None 00473 */ 00474 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) 00475 { 00476 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); 00477 } 00478 00479 /** 00480 * @brief Indicate if DMA2D transfer is suspended. 00481 * @note This API can be used to indicate whether or not automatic foreground or 00482 * background CLUT loading is suspended. 00483 * @rmtoll CR SUSP LL_DMA2D_IsSuspended 00484 * @param DMA2Dx DMA2D Instance 00485 * @retval State of bit (1 or 0). 00486 */ 00487 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) 00488 { 00489 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)); 00490 } 00491 00492 /** 00493 * @brief Abort DMA2D transfer. 00494 * @note This API can be used to abort automatic foreground or background CLUT loading. 00495 * @rmtoll CR ABORT LL_DMA2D_Abort 00496 * @param DMA2Dx DMA2D Instance 00497 * @retval None 00498 */ 00499 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) 00500 { 00501 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); 00502 } 00503 00504 /** 00505 * @brief Indicate if DMA2D transfer is aborted. 00506 * @note This API can be used to indicate whether or not automatic foreground or 00507 * background CLUT loading is aborted. 00508 * @rmtoll CR ABORT LL_DMA2D_IsAborted 00509 * @param DMA2Dx DMA2D Instance 00510 * @retval State of bit (1 or 0). 00511 */ 00512 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) 00513 { 00514 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)); 00515 } 00516 00517 /** 00518 * @brief Set DMA2D mode. 00519 * @rmtoll CR MODE LL_DMA2D_SetMode 00520 * @param DMA2Dx DMA2D Instance 00521 * @param Mode This parameter can be one of the following values: 00522 * @arg @ref LL_DMA2D_MODE_M2M 00523 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00524 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00525 * @arg @ref LL_DMA2D_MODE_R2M 00526 * @retval None 00527 */ 00528 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) 00529 { 00530 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); 00531 } 00532 00533 /** 00534 * @brief Return DMA2D mode 00535 * @rmtoll CR MODE LL_DMA2D_GetMode 00536 * @param DMA2Dx DMA2D Instance 00537 * @retval Returned value can be one of the following values: 00538 * @arg @ref LL_DMA2D_MODE_M2M 00539 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00540 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00541 * @arg @ref LL_DMA2D_MODE_R2M 00542 */ 00543 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) 00544 { 00545 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); 00546 } 00547 00548 /** 00549 * @brief Set DMA2D output color mode. 00550 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode 00551 * @param DMA2Dx DMA2D Instance 00552 * @param ColorMode This parameter can be one of the following values: 00553 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00554 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00555 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00556 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00557 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00558 * @retval None 00559 */ 00560 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00561 { 00562 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); 00563 } 00564 00565 /** 00566 * @brief Return DMA2D output color mode. 00567 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode 00568 * @param DMA2Dx DMA2D Instance 00569 * @retval Returned value can be one of the following values: 00570 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00571 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00572 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00573 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00574 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00575 */ 00576 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) 00577 { 00578 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); 00579 } 00580 00581 /** 00582 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). 00583 * @rmtoll OOR LO LL_DMA2D_SetLineOffset 00584 * @param DMA2Dx DMA2D Instance 00585 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF 00586 * @retval None 00587 */ 00588 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00589 { 00590 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); 00591 } 00592 00593 /** 00594 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). 00595 * @rmtoll OOR LO LL_DMA2D_GetLineOffset 00596 * @param DMA2Dx DMA2D Instance 00597 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF 00598 */ 00599 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 00600 { 00601 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); 00602 } 00603 00604 /** 00605 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). 00606 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines 00607 * @param DMA2Dx DMA2D Instance 00608 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF 00609 * @retval None 00610 */ 00611 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) 00612 { 00613 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); 00614 } 00615 00616 /** 00617 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) 00618 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines 00619 * @param DMA2Dx DMA2D Instance 00620 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF 00621 */ 00622 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) 00623 { 00624 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); 00625 } 00626 00627 /** 00628 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00629 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines 00630 * @param DMA2Dx DMA2D Instance 00631 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF 00632 * @retval None 00633 */ 00634 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) 00635 { 00636 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); 00637 } 00638 00639 /** 00640 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00641 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines 00642 * @param DMA2Dx DMA2D Instance 00643 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF 00644 */ 00645 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) 00646 { 00647 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); 00648 } 00649 00650 /** 00651 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00652 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr 00653 * @param DMA2Dx DMA2D Instance 00654 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00655 * @retval None 00656 */ 00657 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) 00658 { 00659 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); 00660 } 00661 00662 /** 00663 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00664 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr 00665 * @param DMA2Dx DMA2D Instance 00666 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00667 */ 00668 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) 00669 { 00670 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); 00671 } 00672 00673 /** 00674 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). 00675 * @note Output color format depends on output color mode, ARGB8888, RGB888, 00676 * RGB565, ARGB1555 or ARGB4444. 00677 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting 00678 * with respect to color mode is not done by the user code. 00679 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n 00680 * OCOLR GREEN LL_DMA2D_SetOutputColor\n 00681 * OCOLR RED LL_DMA2D_SetOutputColor\n 00682 * OCOLR ALPHA LL_DMA2D_SetOutputColor 00683 * @param DMA2Dx DMA2D Instance 00684 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00685 * @retval None 00686 */ 00687 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) 00688 { 00689 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ 00690 OutputColor); 00691 } 00692 00693 /** 00694 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). 00695 * @note Alpha channel and red, green, blue color values must be retrieved from the returned 00696 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) 00697 * as set by @ref LL_DMA2D_SetOutputColorMode. 00698 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n 00699 * OCOLR GREEN LL_DMA2D_GetOutputColor\n 00700 * OCOLR RED LL_DMA2D_GetOutputColor\n 00701 * OCOLR ALPHA LL_DMA2D_GetOutputColor 00702 * @param DMA2Dx DMA2D Instance 00703 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF 00704 */ 00705 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) 00706 { 00707 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ 00708 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); 00709 } 00710 00711 /** 00712 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00713 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark 00714 * @param DMA2Dx DMA2D Instance 00715 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF 00716 * @retval None 00717 */ 00718 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) 00719 { 00720 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); 00721 } 00722 00723 /** 00724 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00725 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark 00726 * @param DMA2Dx DMA2D Instance 00727 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF 00728 */ 00729 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) 00730 { 00731 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); 00732 } 00733 00734 /** 00735 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). 00736 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime 00737 * @param DMA2Dx DMA2D Instance 00738 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF 00739 * @retval None 00740 */ 00741 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) 00742 { 00743 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); 00744 } 00745 00746 /** 00747 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). 00748 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime 00749 * @param DMA2Dx DMA2D Instance 00750 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF 00751 */ 00752 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) 00753 { 00754 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); 00755 } 00756 00757 /** 00758 * @brief Enable DMA2D dead time functionality. 00759 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime 00760 * @param DMA2Dx DMA2D Instance 00761 * @retval None 00762 */ 00763 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) 00764 { 00765 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00766 } 00767 00768 /** 00769 * @brief Disable DMA2D dead time functionality. 00770 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime 00771 * @param DMA2Dx DMA2D Instance 00772 * @retval None 00773 */ 00774 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) 00775 { 00776 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00777 } 00778 00779 /** 00780 * @brief Indicate if DMA2D dead time functionality is enabled. 00781 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime 00782 * @param DMA2Dx DMA2D Instance 00783 * @retval State of bit (1 or 0). 00784 */ 00785 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) 00786 { 00787 return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)); 00788 } 00789 00790 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions 00791 * @{ 00792 */ 00793 00794 /** 00795 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 00796 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr 00797 * @param DMA2Dx DMA2D Instance 00798 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00799 * @retval None 00800 */ 00801 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 00802 { 00803 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); 00804 } 00805 00806 /** 00807 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 00808 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr 00809 * @param DMA2Dx DMA2D Instance 00810 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00811 */ 00812 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 00813 { 00814 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); 00815 } 00816 00817 /** 00818 * @brief Enable DMA2D foreground CLUT loading. 00819 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad 00820 * @param DMA2Dx DMA2D Instance 00821 * @retval None 00822 */ 00823 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 00824 { 00825 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); 00826 } 00827 00828 /** 00829 * @brief Indicate if DMA2D foreground CLUT loading is enabled. 00830 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad 00831 * @param DMA2Dx DMA2D Instance 00832 * @retval State of bit (1 or 0). 00833 */ 00834 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 00835 { 00836 return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)); 00837 } 00838 00839 /** 00840 * @brief Set DMA2D foreground color mode. 00841 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode 00842 * @param DMA2Dx DMA2D Instance 00843 * @param ColorMode This parameter can be one of the following values: 00844 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 00845 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 00846 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 00847 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 00848 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 00849 * @arg @ref LL_DMA2D_INPUT_MODE_L8 00850 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 00851 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 00852 * @arg @ref LL_DMA2D_INPUT_MODE_L4 00853 * @arg @ref LL_DMA2D_INPUT_MODE_A8 00854 * @arg @ref LL_DMA2D_INPUT_MODE_A4 00855 * @retval None 00856 */ 00857 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00858 { 00859 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); 00860 } 00861 00862 /** 00863 * @brief Return DMA2D foreground color mode. 00864 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode 00865 * @param DMA2Dx DMA2D Instance 00866 * @retval Returned value can be one of the following values: 00867 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 00868 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 00869 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 00870 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 00871 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 00872 * @arg @ref LL_DMA2D_INPUT_MODE_L8 00873 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 00874 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 00875 * @arg @ref LL_DMA2D_INPUT_MODE_L4 00876 * @arg @ref LL_DMA2D_INPUT_MODE_A8 00877 * @arg @ref LL_DMA2D_INPUT_MODE_A4 00878 */ 00879 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 00880 { 00881 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); 00882 } 00883 00884 /** 00885 * @brief Set DMA2D foreground alpha mode. 00886 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode 00887 * @param DMA2Dx DMA2D Instance 00888 * @param AphaMode This parameter can be one of the following values: 00889 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 00890 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 00891 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 00892 * @retval None 00893 */ 00894 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 00895 { 00896 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); 00897 } 00898 00899 /** 00900 * @brief Return DMA2D foreground alpha mode. 00901 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode 00902 * @param DMA2Dx DMA2D Instance 00903 * @retval Returned value can be one of the following values: 00904 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 00905 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 00906 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 00907 */ 00908 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 00909 { 00910 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); 00911 } 00912 00913 /** 00914 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 00915 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha 00916 * @param DMA2Dx DMA2D Instance 00917 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 00918 * @retval None 00919 */ 00920 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 00921 { 00922 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); 00923 } 00924 00925 /** 00926 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 00927 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha 00928 * @param DMA2Dx DMA2D Instance 00929 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 00930 */ 00931 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 00932 { 00933 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); 00934 } 00935 00936 /** 00937 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 00938 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset 00939 * @param DMA2Dx DMA2D Instance 00940 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 00941 * @retval None 00942 */ 00943 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00944 { 00945 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); 00946 } 00947 00948 /** 00949 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 00950 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset 00951 * @param DMA2Dx DMA2D Instance 00952 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF 00953 */ 00954 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 00955 { 00956 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); 00957 } 00958 00959 /** 00960 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). 00961 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor 00962 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor 00963 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor 00964 * @param DMA2Dx DMA2D Instance 00965 * @param Red Value between Min_Data=0 and Max_Data=0xFF 00966 * @param Green Value between Min_Data=0 and Max_Data=0xFF 00967 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 00968 * @retval None 00969 */ 00970 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 00971 { 00972 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ 00973 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); 00974 } 00975 00976 /** 00977 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 00978 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor 00979 * @param DMA2Dx DMA2D Instance 00980 * @param Red Value between Min_Data=0 and Max_Data=0xFF 00981 * @retval None 00982 */ 00983 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 00984 { 00985 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); 00986 } 00987 00988 /** 00989 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 00990 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor 00991 * @param DMA2Dx DMA2D Instance 00992 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 00993 */ 00994 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 00995 { 00996 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); 00997 } 00998 00999 /** 01000 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01001 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor 01002 * @param DMA2Dx DMA2D Instance 01003 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01004 * @retval None 01005 */ 01006 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01007 { 01008 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); 01009 } 01010 01011 /** 01012 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01013 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor 01014 * @param DMA2Dx DMA2D Instance 01015 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01016 */ 01017 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01018 { 01019 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); 01020 } 01021 01022 /** 01023 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01024 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor 01025 * @param DMA2Dx DMA2D Instance 01026 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01027 * @retval None 01028 */ 01029 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01030 { 01031 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); 01032 } 01033 01034 /** 01035 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01036 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor 01037 * @param DMA2Dx DMA2D Instance 01038 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01039 */ 01040 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01041 { 01042 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); 01043 } 01044 01045 /** 01046 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01047 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr 01048 * @param DMA2Dx DMA2D Instance 01049 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01050 * @retval None 01051 */ 01052 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01053 { 01054 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); 01055 } 01056 01057 /** 01058 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01059 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr 01060 * @param DMA2Dx DMA2D Instance 01061 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01062 */ 01063 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01064 { 01065 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); 01066 } 01067 01068 /** 01069 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01070 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize 01071 * @param DMA2Dx DMA2D Instance 01072 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01073 * @retval None 01074 */ 01075 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01076 { 01077 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); 01078 } 01079 01080 /** 01081 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01082 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize 01083 * @param DMA2Dx DMA2D Instance 01084 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF 01085 */ 01086 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01087 { 01088 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); 01089 } 01090 01091 /** 01092 * @brief Set DMA2D foreground CLUT color mode. 01093 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode 01094 * @param DMA2Dx DMA2D Instance 01095 * @param CLUTColorMode This parameter can be one of the following values: 01096 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01097 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01098 * @retval None 01099 */ 01100 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01101 { 01102 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); 01103 } 01104 01105 /** 01106 * @brief Return DMA2D foreground CLUT color mode. 01107 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode 01108 * @param DMA2Dx DMA2D Instance 01109 * @retval Returned value can be one of the following values: 01110 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01111 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01112 */ 01113 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01114 { 01115 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); 01116 } 01117 01118 /** 01119 * @} 01120 */ 01121 01122 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions 01123 * @{ 01124 */ 01125 01126 /** 01127 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01128 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr 01129 * @param DMA2Dx DMA2D Instance 01130 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01131 * @retval None 01132 */ 01133 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01134 { 01135 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); 01136 } 01137 01138 /** 01139 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01140 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr 01141 * @param DMA2Dx DMA2D Instance 01142 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01143 */ 01144 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01145 { 01146 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); 01147 } 01148 01149 /** 01150 * @brief Enable DMA2D background CLUT loading. 01151 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad 01152 * @param DMA2Dx DMA2D Instance 01153 * @retval None 01154 */ 01155 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01156 { 01157 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); 01158 } 01159 01160 /** 01161 * @brief Indicate if DMA2D background CLUT loading is enabled. 01162 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad 01163 * @param DMA2Dx DMA2D Instance 01164 * @retval State of bit (1 or 0). 01165 */ 01166 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01167 { 01168 return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)); 01169 } 01170 01171 /** 01172 * @brief Set DMA2D background color mode. 01173 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode 01174 * @param DMA2Dx DMA2D Instance 01175 * @param ColorMode This parameter can be one of the following values: 01176 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01177 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01178 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01179 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01180 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01181 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01182 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01183 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01184 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01185 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01186 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01187 * @retval None 01188 */ 01189 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01190 { 01191 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); 01192 } 01193 01194 /** 01195 * @brief Return DMA2D background color mode. 01196 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode 01197 * @param DMA2Dx DMA2D Instance 01198 * @retval Returned value can be one of the following values: 01199 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01200 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01201 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01202 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01203 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01204 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01205 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01206 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01207 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01208 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01209 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01210 */ 01211 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01212 { 01213 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); 01214 } 01215 01216 /** 01217 * @brief Set DMA2D background alpha mode. 01218 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode 01219 * @param DMA2Dx DMA2D Instance 01220 * @param AphaMode This parameter can be one of the following values: 01221 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01222 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01223 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01224 * @retval None 01225 */ 01226 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01227 { 01228 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); 01229 } 01230 01231 /** 01232 * @brief Return DMA2D background alpha mode. 01233 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode 01234 * @param DMA2Dx DMA2D Instance 01235 * @retval Returned value can be one of the following values: 01236 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01237 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01238 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01239 */ 01240 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01241 { 01242 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); 01243 } 01244 01245 /** 01246 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01247 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha 01248 * @param DMA2Dx DMA2D Instance 01249 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01250 * @retval None 01251 */ 01252 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01253 { 01254 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); 01255 } 01256 01257 /** 01258 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01259 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha 01260 * @param DMA2Dx DMA2D Instance 01261 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01262 */ 01263 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01264 { 01265 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); 01266 } 01267 01268 /** 01269 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01270 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset 01271 * @param DMA2Dx DMA2D Instance 01272 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01273 * @retval None 01274 */ 01275 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01276 { 01277 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); 01278 } 01279 01280 /** 01281 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01282 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset 01283 * @param DMA2Dx DMA2D Instance 01284 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF 01285 */ 01286 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01287 { 01288 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); 01289 } 01290 01291 /** 01292 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). 01293 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor 01294 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor 01295 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor 01296 * @param DMA2Dx DMA2D Instance 01297 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01298 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01299 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01300 * @retval None 01301 */ 01302 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01303 { 01304 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ 01305 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); 01306 } 01307 01308 /** 01309 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01310 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor 01311 * @param DMA2Dx DMA2D Instance 01312 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01313 * @retval None 01314 */ 01315 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01316 { 01317 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); 01318 } 01319 01320 /** 01321 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01322 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor 01323 * @param DMA2Dx DMA2D Instance 01324 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01325 */ 01326 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01327 { 01328 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); 01329 } 01330 01331 /** 01332 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01333 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor 01334 * @param DMA2Dx DMA2D Instance 01335 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01336 * @retval None 01337 */ 01338 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01339 { 01340 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); 01341 } 01342 01343 /** 01344 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01345 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor 01346 * @param DMA2Dx DMA2D Instance 01347 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01348 */ 01349 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01350 { 01351 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); 01352 } 01353 01354 /** 01355 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01356 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor 01357 * @param DMA2Dx DMA2D Instance 01358 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01359 * @retval None 01360 */ 01361 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01362 { 01363 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); 01364 } 01365 01366 /** 01367 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01368 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor 01369 * @param DMA2Dx DMA2D Instance 01370 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01371 */ 01372 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01373 { 01374 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); 01375 } 01376 01377 /** 01378 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01379 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr 01380 * @param DMA2Dx DMA2D Instance 01381 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01382 * @retval None 01383 */ 01384 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01385 { 01386 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); 01387 } 01388 01389 /** 01390 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01391 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr 01392 * @param DMA2Dx DMA2D Instance 01393 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01394 */ 01395 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01396 { 01397 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); 01398 } 01399 01400 /** 01401 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01402 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize 01403 * @param DMA2Dx DMA2D Instance 01404 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01405 * @retval None 01406 */ 01407 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01408 { 01409 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); 01410 } 01411 01412 /** 01413 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01414 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize 01415 * @param DMA2Dx DMA2D Instance 01416 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF 01417 */ 01418 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01419 { 01420 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); 01421 } 01422 01423 /** 01424 * @brief Set DMA2D background CLUT color mode. 01425 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode 01426 * @param DMA2Dx DMA2D Instance 01427 * @param CLUTColorMode This parameter can be one of the following values: 01428 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01429 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01430 * @retval None 01431 */ 01432 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01433 { 01434 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); 01435 } 01436 01437 /** 01438 * @brief Return DMA2D background CLUT color mode. 01439 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode 01440 * @param DMA2Dx DMA2D Instance 01441 * @retval Returned value can be one of the following values: 01442 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01443 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01444 */ 01445 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01446 { 01447 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); 01448 } 01449 01450 /** 01451 * @} 01452 */ 01453 01454 /** 01455 * @} 01456 */ 01457 01458 01459 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management 01460 * @{ 01461 */ 01462 01463 /** 01464 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not 01465 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE 01466 * @param DMA2Dx DMA2D Instance 01467 * @retval State of bit (1 or 0). 01468 */ 01469 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) 01470 { 01471 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)); 01472 } 01473 01474 /** 01475 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not 01476 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC 01477 * @param DMA2Dx DMA2D Instance 01478 * @retval State of bit (1 or 0). 01479 */ 01480 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01481 { 01482 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)); 01483 } 01484 01485 /** 01486 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not 01487 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE 01488 * @param DMA2Dx DMA2D Instance 01489 * @retval State of bit (1 or 0). 01490 */ 01491 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01492 { 01493 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)); 01494 } 01495 01496 /** 01497 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not 01498 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW 01499 * @param DMA2Dx DMA2D Instance 01500 * @retval State of bit (1 or 0). 01501 */ 01502 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) 01503 { 01504 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)); 01505 } 01506 01507 /** 01508 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not 01509 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC 01510 * @param DMA2Dx DMA2D Instance 01511 * @retval State of bit (1 or 0). 01512 */ 01513 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) 01514 { 01515 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)); 01516 } 01517 01518 /** 01519 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not 01520 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE 01521 * @param DMA2Dx DMA2D Instance 01522 * @retval State of bit (1 or 0). 01523 */ 01524 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) 01525 { 01526 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)); 01527 } 01528 01529 /** 01530 * @brief Clear DMA2D Configuration Error Interrupt Flag 01531 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE 01532 * @param DMA2Dx DMA2D Instance 01533 * @retval None 01534 */ 01535 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) 01536 { 01537 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); 01538 } 01539 01540 /** 01541 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag 01542 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC 01543 * @param DMA2Dx DMA2D Instance 01544 * @retval None 01545 */ 01546 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01547 { 01548 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); 01549 } 01550 01551 /** 01552 * @brief Clear DMA2D CLUT Access Error Interrupt Flag 01553 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE 01554 * @param DMA2Dx DMA2D Instance 01555 * @retval None 01556 */ 01557 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01558 { 01559 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); 01560 } 01561 01562 /** 01563 * @brief Clear DMA2D Transfer Watermark Interrupt Flag 01564 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW 01565 * @param DMA2Dx DMA2D Instance 01566 * @retval None 01567 */ 01568 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) 01569 { 01570 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); 01571 } 01572 01573 /** 01574 * @brief Clear DMA2D Transfer Complete Interrupt Flag 01575 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC 01576 * @param DMA2Dx DMA2D Instance 01577 * @retval None 01578 */ 01579 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) 01580 { 01581 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); 01582 } 01583 01584 /** 01585 * @brief Clear DMA2D Transfer Error Interrupt Flag 01586 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE 01587 * @param DMA2Dx DMA2D Instance 01588 * @retval None 01589 */ 01590 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) 01591 { 01592 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); 01593 } 01594 01595 /** 01596 * @} 01597 */ 01598 01599 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management 01600 * @{ 01601 */ 01602 01603 /** 01604 * @brief Enable Configuration Error Interrupt 01605 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE 01606 * @param DMA2Dx DMA2D Instance 01607 * @retval None 01608 */ 01609 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) 01610 { 01611 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01612 } 01613 01614 /** 01615 * @brief Enable CLUT Transfer Complete Interrupt 01616 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC 01617 * @param DMA2Dx DMA2D Instance 01618 * @retval None 01619 */ 01620 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01621 { 01622 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01623 } 01624 01625 /** 01626 * @brief Enable CLUT Access Error Interrupt 01627 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE 01628 * @param DMA2Dx DMA2D Instance 01629 * @retval None 01630 */ 01631 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) 01632 { 01633 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 01634 } 01635 01636 /** 01637 * @brief Enable Transfer Watermark Interrupt 01638 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW 01639 * @param DMA2Dx DMA2D Instance 01640 * @retval None 01641 */ 01642 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) 01643 { 01644 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 01645 } 01646 01647 /** 01648 * @brief Enable Transfer Complete Interrupt 01649 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC 01650 * @param DMA2Dx DMA2D Instance 01651 * @retval None 01652 */ 01653 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) 01654 { 01655 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 01656 } 01657 01658 /** 01659 * @brief Enable Transfer Error Interrupt 01660 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE 01661 * @param DMA2Dx DMA2D Instance 01662 * @retval None 01663 */ 01664 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) 01665 { 01666 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 01667 } 01668 01669 /** 01670 * @brief Disable Configuration Error Interrupt 01671 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE 01672 * @param DMA2Dx DMA2D Instance 01673 * @retval None 01674 */ 01675 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) 01676 { 01677 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01678 } 01679 01680 /** 01681 * @brief Disable CLUT Transfer Complete Interrupt 01682 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC 01683 * @param DMA2Dx DMA2D Instance 01684 * @retval None 01685 */ 01686 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01687 { 01688 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01689 } 01690 01691 /** 01692 * @brief Disable CLUT Access Error Interrupt 01693 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE 01694 * @param DMA2Dx DMA2D Instance 01695 * @retval None 01696 */ 01697 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) 01698 { 01699 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 01700 } 01701 01702 /** 01703 * @brief Disable Transfer Watermark Interrupt 01704 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW 01705 * @param DMA2Dx DMA2D Instance 01706 * @retval None 01707 */ 01708 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) 01709 { 01710 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 01711 } 01712 01713 /** 01714 * @brief Disable Transfer Complete Interrupt 01715 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC 01716 * @param DMA2Dx DMA2D Instance 01717 * @retval None 01718 */ 01719 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) 01720 { 01721 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 01722 } 01723 01724 /** 01725 * @brief Disable Transfer Error Interrupt 01726 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE 01727 * @param DMA2Dx DMA2D Instance 01728 * @retval None 01729 */ 01730 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) 01731 { 01732 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 01733 } 01734 01735 /** 01736 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. 01737 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE 01738 * @param DMA2Dx DMA2D Instance 01739 * @retval State of bit (1 or 0). 01740 */ 01741 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) 01742 { 01743 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)); 01744 } 01745 01746 /** 01747 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. 01748 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC 01749 * @param DMA2Dx DMA2D Instance 01750 * @retval State of bit (1 or 0). 01751 */ 01752 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) 01753 { 01754 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)); 01755 } 01756 01757 /** 01758 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. 01759 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE 01760 * @param DMA2Dx DMA2D Instance 01761 * @retval State of bit (1 or 0). 01762 */ 01763 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) 01764 { 01765 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)); 01766 } 01767 01768 /** 01769 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. 01770 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW 01771 * @param DMA2Dx DMA2D Instance 01772 * @retval State of bit (1 or 0). 01773 */ 01774 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) 01775 { 01776 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)); 01777 } 01778 01779 /** 01780 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. 01781 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC 01782 * @param DMA2Dx DMA2D Instance 01783 * @retval State of bit (1 or 0). 01784 */ 01785 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) 01786 { 01787 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)); 01788 } 01789 01790 /** 01791 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. 01792 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE 01793 * @param DMA2Dx DMA2D Instance 01794 * @retval State of bit (1 or 0). 01795 */ 01796 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) 01797 { 01798 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)); 01799 } 01800 01801 01802 01803 /** 01804 * @} 01805 */ 01806 01807 #if defined(USE_FULL_LL_DRIVER) 01808 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions 01809 * @{ 01810 */ 01811 01812 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); 01813 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 01814 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 01815 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); 01816 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); 01817 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); 01818 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01819 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01820 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01821 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01822 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); 01823 01824 /** 01825 * @} 01826 */ 01827 #endif /* USE_FULL_LL_DRIVER */ 01828 01829 /** 01830 * @} 01831 */ 01832 01833 /** 01834 * @} 01835 */ 01836 01837 #endif /* defined (DMA2D) */ 01838 01839 /** 01840 * @} 01841 */ 01842 01843 #ifdef __cplusplus 01844 } 01845 #endif 01846 01847 #endif /* __STM32F4xx_LL_DMA2D_H */ 01848 01849 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/