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STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_spi.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_SPI_H 00038 #define __STM32F4xx_HAL_SPI_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32f4xx_hal_def.h" 00046 00047 /** @addtogroup STM32F4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup SPI 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup SPI_Exported_Types SPI Exported Types 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief SPI Configuration Structure definition 00062 */ 00063 typedef struct 00064 { 00065 uint32_t Mode; /*!< Specifies the SPI operating mode. 00066 This parameter can be a value of @ref SPI_Mode */ 00067 00068 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 00069 This parameter can be a value of @ref SPI_Direction */ 00070 00071 uint32_t DataSize; /*!< Specifies the SPI data size. 00072 This parameter can be a value of @ref SPI_Data_Size */ 00073 00074 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 00075 This parameter can be a value of @ref SPI_Clock_Polarity */ 00076 00077 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 00078 This parameter can be a value of @ref SPI_Clock_Phase */ 00079 00080 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 00081 hardware (NSS pin) or by software using the SSI bit. 00082 This parameter can be a value of @ref SPI_Slave_Select_management */ 00083 00084 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 00085 used to configure the transmit and receive SCK clock. 00086 This parameter can be a value of @ref SPI_BaudRate_Prescaler 00087 @note The communication clock is derived from the master 00088 clock. The slave clock does not need to be set. */ 00089 00090 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00091 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 00092 00093 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 00094 This parameter can be a value of @ref SPI_TI_mode */ 00095 00096 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 00097 This parameter can be a value of @ref SPI_CRC_Calculation */ 00098 00099 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 00100 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ 00101 }SPI_InitTypeDef; 00102 00103 /** 00104 * @brief HAL SPI State structure definition 00105 */ 00106 typedef enum 00107 { 00108 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 00109 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 00110 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 00111 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 00112 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 00113 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 00114 HAL_SPI_STATE_ERROR = 0x06U /*!< SPI error state */ 00115 }HAL_SPI_StateTypeDef; 00116 00117 /** 00118 * @brief SPI handle Structure definition 00119 */ 00120 typedef struct __SPI_HandleTypeDef 00121 { 00122 SPI_TypeDef *Instance; /* SPI registers base address */ 00123 00124 SPI_InitTypeDef Init; /* SPI communication parameters */ 00125 00126 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ 00127 00128 uint16_t TxXferSize; /* SPI Tx Transfer size */ 00129 00130 __IO uint16_t TxXferCount; /* SPI Tx Transfer Counter */ 00131 00132 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ 00133 00134 uint16_t RxXferSize; /* SPI Rx Transfer size */ 00135 00136 __IO uint16_t RxXferCount; /* SPI Rx Transfer Counter */ 00137 00138 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */ 00139 00140 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */ 00141 00142 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */ 00143 00144 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */ 00145 00146 HAL_LockTypeDef Lock; /* Locking object */ 00147 00148 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */ 00149 00150 __IO uint32_t ErrorCode; /* SPI Error code */ 00151 00152 }SPI_HandleTypeDef; 00153 00154 /** 00155 * @} 00156 */ 00157 00158 /* Exported constants --------------------------------------------------------*/ 00159 /** @defgroup SPI_Exported_Constants SPI Exported Constants 00160 * @{ 00161 */ 00162 00163 /** @defgroup SPI_Error_Code SPI Error Code 00164 * @{ 00165 */ 00166 #define HAL_SPI_ERROR_NONE 0x00000000U /*!< No error */ 00167 #define HAL_SPI_ERROR_MODF 0x00000001U /*!< MODF error */ 00168 #define HAL_SPI_ERROR_CRC 0x00000002U /*!< CRC error */ 00169 #define HAL_SPI_ERROR_OVR 0x00000004U /*!< OVR error */ 00170 #define HAL_SPI_ERROR_FRE 0x00000008U /*!< FRE error */ 00171 #define HAL_SPI_ERROR_DMA 0x00000010U /*!< DMA transfer error */ 00172 #define HAL_SPI_ERROR_FLAG 0x00000020U /*!< Flag: RXNE,TXE, BSY */ 00173 /** 00174 * @} 00175 */ 00176 00177 /** @defgroup SPI_Mode SPI Mode 00178 * @{ 00179 */ 00180 #define SPI_MODE_SLAVE 0x00000000U 00181 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 00182 /** 00183 * @} 00184 */ 00185 00186 /** @defgroup SPI_Direction SPI Direction Mode 00187 * @{ 00188 */ 00189 #define SPI_DIRECTION_2LINES 0x00000000U 00190 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 00191 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 00192 /** 00193 * @} 00194 */ 00195 00196 /** @defgroup SPI_Data_Size SPI Data Size 00197 * @{ 00198 */ 00199 #define SPI_DATASIZE_8BIT 0x00000000U 00200 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 00201 /** 00202 * @} 00203 */ 00204 00205 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 00206 * @{ 00207 */ 00208 #define SPI_POLARITY_LOW 0x00000000U 00209 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 00210 /** 00211 * @} 00212 */ 00213 00214 /** @defgroup SPI_Clock_Phase SPI Clock Phase 00215 * @{ 00216 */ 00217 #define SPI_PHASE_1EDGE 0x00000000U 00218 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 00219 /** 00220 * @} 00221 */ 00222 00223 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 00224 * @{ 00225 */ 00226 #define SPI_NSS_SOFT SPI_CR1_SSM 00227 #define SPI_NSS_HARD_INPUT 0x00000000U 00228 #define SPI_NSS_HARD_OUTPUT 0x00040000U 00229 /** 00230 * @} 00231 */ 00232 00233 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 00234 * @{ 00235 */ 00236 #define SPI_BAUDRATEPRESCALER_2 0x00000000U 00237 #define SPI_BAUDRATEPRESCALER_4 0x00000008U 00238 #define SPI_BAUDRATEPRESCALER_8 0x00000010U 00239 #define SPI_BAUDRATEPRESCALER_16 0x00000018U 00240 #define SPI_BAUDRATEPRESCALER_32 0x00000020U 00241 #define SPI_BAUDRATEPRESCALER_64 0x00000028U 00242 #define SPI_BAUDRATEPRESCALER_128 0x00000030U 00243 #define SPI_BAUDRATEPRESCALER_256 0x00000038U 00244 /** 00245 * @} 00246 */ 00247 00248 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 00249 * @{ 00250 */ 00251 #define SPI_FIRSTBIT_MSB 0x00000000U 00252 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 00253 /** 00254 * @} 00255 */ 00256 00257 /** @defgroup SPI_TI_mode SPI TI Mode 00258 * @{ 00259 */ 00260 #define SPI_TIMODE_DISABLE 0x00000000U 00261 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 00262 /** 00263 * @} 00264 */ 00265 00266 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 00267 * @{ 00268 */ 00269 #define SPI_CRCCALCULATION_DISABLE 0x00000000U 00270 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 00271 /** 00272 * @} 00273 */ 00274 00275 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 00276 * @{ 00277 */ 00278 #define SPI_IT_TXE SPI_CR2_TXEIE 00279 #define SPI_IT_RXNE SPI_CR2_RXNEIE 00280 #define SPI_IT_ERR SPI_CR2_ERRIE 00281 /** 00282 * @} 00283 */ 00284 00285 /** @defgroup SPI_Flags_definition SPI Flags Definition 00286 * @{ 00287 */ 00288 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 00289 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 00290 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 00291 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 00292 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 00293 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 00294 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ 00295 /** 00296 * @} 00297 */ 00298 00299 /** 00300 * @} 00301 */ 00302 00303 /* Exported macro ------------------------------------------------------------*/ 00304 /** @defgroup SPI_Exported_Macros SPI Exported Macros 00305 * @{ 00306 */ 00307 00308 /** @brief Reset SPI handle state. 00309 * @param __HANDLE__ specifies the SPI Handle. 00310 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00311 * @retval None 00312 */ 00313 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 00314 00315 /** @brief Enable or disable the specified SPI interrupts. 00316 * @param __HANDLE__ specifies the SPI Handle. 00317 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00318 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00319 * This parameter can be one of the following values: 00320 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00321 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00322 * @arg SPI_IT_ERR: Error interrupt enable 00323 * @retval None 00324 */ 00325 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) 00326 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) 00327 00328 /** @brief Check whether the specified SPI interrupt source is enabled or not. 00329 * @param __HANDLE__ specifies the SPI Handle. 00330 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00331 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00332 * This parameter can be one of the following values: 00333 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00334 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00335 * @arg SPI_IT_ERR: Error interrupt enable 00336 * @retval The new state of __IT__ (TRUE or FALSE). 00337 */ 00338 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00339 00340 /** @brief Check whether the specified SPI flag is set or not. 00341 * @param __HANDLE__ specifies the SPI Handle. 00342 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00343 * @param __FLAG__ specifies the flag to check. 00344 * This parameter can be one of the following values: 00345 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 00346 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 00347 * @arg SPI_FLAG_CRCERR: CRC error flag 00348 * @arg SPI_FLAG_MODF: Mode fault flag 00349 * @arg SPI_FLAG_OVR: Overrun flag 00350 * @arg SPI_FLAG_BSY: Busy flag 00351 * @arg SPI_FLAG_FRE: Frame format error flag 00352 * @retval The new state of __FLAG__ (TRUE or FALSE). 00353 */ 00354 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00355 00356 /** @brief Clear the SPI CRCERR pending flag. 00357 * @param __HANDLE__ specifies the SPI Handle. 00358 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00359 * @retval None 00360 */ 00361 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 00362 00363 /** @brief Clear the SPI MODF pending flag. 00364 * @param __HANDLE__ specifies the SPI Handle. 00365 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00366 * @retval None 00367 */ 00368 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 00369 do{ \ 00370 __IO uint32_t tmpreg_modf = 0x00U; \ 00371 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 00372 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ 00373 UNUSED(tmpreg_modf); \ 00374 } while(0U) 00375 00376 /** @brief Clear the SPI OVR pending flag. 00377 * @param __HANDLE__ specifies the SPI Handle. 00378 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00379 * @retval None 00380 */ 00381 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 00382 do{ \ 00383 __IO uint32_t tmpreg_ovr = 0x00U; \ 00384 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 00385 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 00386 UNUSED(tmpreg_ovr); \ 00387 } while(0U) 00388 00389 /** @brief Clear the SPI FRE pending flag. 00390 * @param __HANDLE__ specifies the SPI Handle. 00391 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00392 * @retval None 00393 */ 00394 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 00395 do{ \ 00396 __IO uint32_t tmpreg_fre = 0x00U; \ 00397 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 00398 UNUSED(tmpreg_fre); \ 00399 }while(0U) 00400 00401 /** @brief Enable the SPI peripheral. 00402 * @param __HANDLE__ specifies the SPI Handle. 00403 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00404 * @retval None 00405 */ 00406 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) 00407 00408 /** @brief Disable the SPI peripheral. 00409 * @param __HANDLE__ specifies the SPI Handle. 00410 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00411 * @retval None 00412 */ 00413 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE)) 00414 /** 00415 * @} 00416 */ 00417 00418 /* Exported functions --------------------------------------------------------*/ 00419 /** @addtogroup SPI_Exported_Functions 00420 * @{ 00421 */ 00422 00423 /** @addtogroup SPI_Exported_Functions_Group1 00424 * @{ 00425 */ 00426 /* Initialization/de-initialization functions **********************************/ 00427 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 00428 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); 00429 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 00430 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 00431 /** 00432 * @} 00433 */ 00434 00435 /** @addtogroup SPI_Exported_Functions_Group2 00436 * @{ 00437 */ 00438 /* I/O operation functions *****************************************************/ 00439 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00440 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00441 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); 00442 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00443 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00444 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); 00445 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00446 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00447 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); 00448 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 00449 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 00450 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 00451 /* Transfer Abort functions */ 00452 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 00453 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 00454 00455 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 00456 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 00457 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 00458 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 00459 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00460 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00461 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00462 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 00463 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 00464 /** 00465 * @} 00466 */ 00467 00468 /** @addtogroup SPI_Exported_Functions_Group3 00469 * @{ 00470 */ 00471 /* Peripheral State and Error functions ***************************************/ 00472 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 00473 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 00474 /** 00475 * @} 00476 */ 00477 00478 /** 00479 * @} 00480 */ 00481 00482 /* Private types -------------------------------------------------------------*/ 00483 /* Private variables ---------------------------------------------------------*/ 00484 /* Private constants ---------------------------------------------------------*/ 00485 00486 /* Private macros ------------------------------------------------------------*/ 00487 /** @defgroup SPI_Private_Macros SPI Private Macros 00488 * @{ 00489 */ 00490 00491 /** @brief Set the SPI transmit-only mode. 00492 * @param __HANDLE__ specifies the SPI Handle. 00493 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00494 * @retval None 00495 */ 00496 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) 00497 00498 /** @brief Set the SPI receive-only mode. 00499 * @param __HANDLE__ specifies the SPI Handle. 00500 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00501 * @retval None 00502 */ 00503 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE)) 00504 00505 /** @brief Reset the CRC calculation of the SPI. 00506 * @param __HANDLE__ specifies the SPI Handle. 00507 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00508 * @retval None 00509 */ 00510 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\ 00511 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0U) 00512 00513 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ 00514 ((MODE) == SPI_MODE_MASTER)) 00515 00516 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ 00517 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \ 00518 ((MODE) == SPI_DIRECTION_1LINE)) 00519 00520 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) 00521 00522 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ 00523 ((MODE) == SPI_DIRECTION_1LINE)) 00524 00525 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ 00526 ((DATASIZE) == SPI_DATASIZE_8BIT)) 00527 00528 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ 00529 ((CPOL) == SPI_POLARITY_HIGH)) 00530 00531 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ 00532 ((CPHA) == SPI_PHASE_2EDGE)) 00533 00534 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ 00535 ((NSS) == SPI_NSS_HARD_INPUT) || \ 00536 ((NSS) == SPI_NSS_HARD_OUTPUT)) 00537 00538 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ 00539 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ 00540 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ 00541 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ 00542 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ 00543 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ 00544 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ 00545 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) 00546 00547 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ 00548 ((BIT) == SPI_FIRSTBIT_LSB)) 00549 00550 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \ 00551 ((MODE) == SPI_TIMODE_ENABLE)) 00552 00553 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \ 00554 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE)) 00555 00556 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU)) 00557 00558 /** 00559 * @} 00560 */ 00561 00562 /* Private functions ---------------------------------------------------------*/ 00563 /** @defgroup SPI_Private_Functions SPI Private Functions 00564 * @{ 00565 */ 00566 00567 /** 00568 * @} 00569 */ 00570 00571 /** 00572 * @} 00573 */ 00574 00575 /** 00576 * @} 00577 */ 00578 00579 #ifdef __cplusplus 00580 } 00581 #endif 00582 00583 #endif /* __STM32F4xx_HAL_SPI_H */ 00584 00585 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1