STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_spdifrx.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPDIFRX HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_SPDIFRX_H 00038 #define __STM32F4xx_HAL_SPDIFRX_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 #if defined(STM32F446xx) 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include "stm32f4xx_hal_def.h" 00048 00049 /** @addtogroup STM32F4xx_HAL_Driver 00050 * @{ 00051 */ 00052 00053 /** @addtogroup SPDIFRX 00054 * @{ 00055 */ 00056 00057 /* Exported types ------------------------------------------------------------*/ 00058 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 00059 * @{ 00060 */ 00061 00062 /** 00063 * @brief SPDIFRX Init structure definition 00064 */ 00065 typedef struct 00066 { 00067 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 00068 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 00069 00070 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 00071 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 00072 00073 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 00074 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 00075 00076 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. 00077 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 00078 00079 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 00080 This parameter can be a value of @ref SPDIFRX_Data_Format */ 00081 00082 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 00083 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 00084 00085 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 00086 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 00087 00088 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 00089 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 00090 00091 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 00092 This parameter can be a value of @ref SPDIFRX_V_Mask */ 00093 00094 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 00095 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 00096 }SPDIFRX_InitTypeDef; 00097 00098 /** 00099 * @brief SPDIFRX SetDataFormat structure definition 00100 */ 00101 typedef struct 00102 { 00103 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 00104 This parameter can be a value of @ref SPDIFRX_Data_Format */ 00105 00106 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 00107 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 00108 00109 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 00110 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 00111 00112 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 00113 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 00114 00115 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 00116 This parameter can be a value of @ref SPDIFRX_V_Mask */ 00117 00118 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 00119 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 00120 }SPDIFRX_SetDataFormatTypeDef; 00121 00122 /** 00123 * @brief HAL State structures definition 00124 */ 00125 typedef enum 00126 { 00127 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 00128 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 00129 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 00130 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 00131 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 00132 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 00133 }HAL_SPDIFRX_StateTypeDef; 00134 00135 /** 00136 * @brief SPDIFRX handle Structure definition 00137 */ 00138 typedef struct 00139 { 00140 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 00141 00142 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 00143 00144 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 00145 00146 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 00147 00148 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 00149 00150 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 00151 (This field is initialized at the 00152 same value as transfer size at the 00153 beginning of the transfer and 00154 decremented when a sample is received. 00155 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00156 00157 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 00158 00159 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 00160 (This field is initialized at the 00161 same value as transfer size at the 00162 beginning of the transfer and 00163 decremented when a sample is received. 00164 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00165 00166 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ 00167 00168 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 00169 00170 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 00171 00172 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 00173 00174 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 00175 }SPDIFRX_HandleTypeDef; 00176 /** 00177 * @} 00178 */ 00179 00180 /* Exported constants --------------------------------------------------------*/ 00181 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 00182 * @{ 00183 */ 00184 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 00185 * @{ 00186 */ 00187 #define HAL_SPDIFRX_ERROR_NONE 0x00000000U /*!< No error */ 00188 #define HAL_SPDIFRX_ERROR_TIMEOUT 0x00000001U /*!< Timeout error */ 00189 #define HAL_SPDIFRX_ERROR_OVR 0x00000002U /*!< OVR error */ 00190 #define HAL_SPDIFRX_ERROR_PE 0x00000004U /*!< Parity error */ 00191 #define HAL_SPDIFRX_ERROR_DMA 0x00000008U /*!< DMA transfer error */ 00192 #define HAL_SPDIFRX_ERROR_UNKNOWN 0x00000010U /*!< Unknown Error error */ 00193 /** 00194 * @} 00195 */ 00196 00197 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 00198 * @{ 00199 */ 00200 #define SPDIFRX_INPUT_IN0 0x00000000U 00201 #define SPDIFRX_INPUT_IN1 0x00010000U 00202 #define SPDIFRX_INPUT_IN2 0x00020000U 00203 #define SPDIFRX_INPUT_IN3 0x00030000U 00204 /** 00205 * @} 00206 */ 00207 00208 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 00209 * @{ 00210 */ 00211 #define SPDIFRX_MAXRETRIES_NONE 0x00000000U 00212 #define SPDIFRX_MAXRETRIES_3 0x00001000U 00213 #define SPDIFRX_MAXRETRIES_15 0x00002000U 00214 #define SPDIFRX_MAXRETRIES_63 0x00003000U 00215 /** 00216 * @} 00217 */ 00218 00219 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 00220 * @{ 00221 */ 00222 #define SPDIFRX_WAITFORACTIVITY_OFF 0x00000000U 00223 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 00224 /** 00225 * @} 00226 */ 00227 00228 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 00229 * @{ 00230 */ 00231 #define SPDIFRX_PREAMBLETYPEMASK_OFF 0x00000000U 00232 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 00233 /** 00234 * @} 00235 */ 00236 00237 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 00238 * @{ 00239 */ 00240 #define SPDIFRX_CHANNELSTATUS_OFF 0x00000000U /* The channel status and user bits are copied into the SPDIF_DR */ 00241 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ 00242 /** 00243 * @} 00244 */ 00245 00246 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 00247 * @{ 00248 */ 00249 #define SPDIFRX_VALIDITYMASK_OFF 0x00000000U 00250 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 00251 /** 00252 * @} 00253 */ 00254 00255 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 00256 * @{ 00257 */ 00258 #define SPDIFRX_PARITYERRORMASK_OFF 0x00000000U 00259 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 00260 /** 00261 * @} 00262 */ 00263 00264 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 00265 * @{ 00266 */ 00267 #define SPDIFRX_CHANNEL_A 0x00000000U 00268 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 00269 /** 00270 * @} 00271 */ 00272 00273 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 00274 * @{ 00275 */ 00276 #define SPDIFRX_DATAFORMAT_LSB 0x00000000U 00277 #define SPDIFRX_DATAFORMAT_MSB 0x00000010U 00278 #define SPDIFRX_DATAFORMAT_32BITS 0x00000020U 00279 /** 00280 * @} 00281 */ 00282 00283 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 00284 * @{ 00285 */ 00286 #define SPDIFRX_STEREOMODE_DISABLE 0x00000000U 00287 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 00288 /** 00289 * @} 00290 */ 00291 00292 /** @defgroup SPDIFRX_State SPDIFRX State 00293 * @{ 00294 */ 00295 00296 #define SPDIFRX_STATE_IDLE 0xFFFFFFFCU 00297 #define SPDIFRX_STATE_SYNC 0x00000001U 00298 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 00299 /** 00300 * @} 00301 */ 00302 00303 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 00304 * @{ 00305 */ 00306 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 00307 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 00308 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 00309 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 00310 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 00311 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 00312 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 00313 /** 00314 * @} 00315 */ 00316 00317 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 00318 * @{ 00319 */ 00320 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 00321 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 00322 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 00323 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 00324 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 00325 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 00326 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 00327 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 00328 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 00329 /** 00330 * @} 00331 */ 00332 00333 /** 00334 * @} 00335 */ 00336 00337 /* Exported macros -----------------------------------------------------------*/ 00338 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 00339 * @{ 00340 */ 00341 00342 /** @brief Reset SPDIFRX handle state 00343 * @param __HANDLE__ SPDIFRX handle. 00344 * @retval None 00345 */ 00346 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN) 00347 00348 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 00349 * @param __HANDLE__ specifies the SPDIFRX Handle. 00350 * @retval None 00351 */ 00352 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 00353 00354 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 00355 * @param __HANDLE__ specifies the SPDIFRX Handle. 00356 * @retval None 00357 */ 00358 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 00359 00360 00361 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 00362 * @param __HANDLE__ specifies the SPDIFRX Handle. 00363 * @retval None 00364 */ 00365 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 00366 00367 /** @brief Enable or disable the specified SPDIFRX interrupts. 00368 * @param __HANDLE__ specifies the SPDIFRX Handle. 00369 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00370 * This parameter can be one of the following values: 00371 * @arg SPDIFRX_IT_RXNE 00372 * @arg SPDIFRX_IT_CSRNE 00373 * @arg SPDIFRX_IT_PERRIE 00374 * @arg SPDIFRX_IT_OVRIE 00375 * @arg SPDIFRX_IT_SBLKIE 00376 * @arg SPDIFRX_IT_SYNCDIE 00377 * @arg SPDIFRX_IT_IFEIE 00378 * @retval None 00379 */ 00380 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 00381 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__))) 00382 00383 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 00384 * @param __HANDLE__ specifies the SPDIFRX Handle. 00385 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 00386 * This parameter can be one of the following values: 00387 * @arg SPDIFRX_IT_RXNE 00388 * @arg SPDIFRX_IT_CSRNE 00389 * @arg SPDIFRX_IT_PERRIE 00390 * @arg SPDIFRX_IT_OVRIE 00391 * @arg SPDIFRX_IT_SBLKIE 00392 * @arg SPDIFRX_IT_SYNCDIE 00393 * @arg SPDIFRX_IT_IFEIE 00394 * @retval The new state of __IT__ (TRUE or FALSE). 00395 */ 00396 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00397 00398 /** @brief Checks whether the specified SPDIFRX flag is set or not. 00399 * @param __HANDLE__ specifies the SPDIFRX Handle. 00400 * @param __FLAG__ specifies the flag to check. 00401 * This parameter can be one of the following values: 00402 * @arg SPDIFRX_FLAG_RXNE 00403 * @arg SPDIFRX_FLAG_CSRNE 00404 * @arg SPDIFRX_FLAG_PERR 00405 * @arg SPDIFRX_FLAG_OVR 00406 * @arg SPDIFRX_FLAG_SBD 00407 * @arg SPDIFRX_FLAG_SYNCD 00408 * @arg SPDIFRX_FLAG_FERR 00409 * @arg SPDIFRX_FLAG_SERR 00410 * @arg SPDIFRX_FLAG_TERR 00411 * @retval The new state of __FLAG__ (TRUE or FALSE). 00412 */ 00413 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00414 00415 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 00416 * @param __HANDLE__ specifies the USART Handle. 00417 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 00418 * to clear the corresponding interrupt 00419 * This parameter can be one of the following values: 00420 * @arg SPDIFRX_FLAG_PERR 00421 * @arg SPDIFRX_FLAG_OVR 00422 * @arg SPDIFRX_SR_SBD 00423 * @arg SPDIFRX_SR_SYNCD 00424 * @retval None 00425 */ 00426 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 00427 00428 /** 00429 * @} 00430 */ 00431 00432 /* Exported functions --------------------------------------------------------*/ 00433 /** @addtogroup SPDIFRX_Exported_Functions 00434 * @{ 00435 */ 00436 00437 /** @addtogroup SPDIFRX_Exported_Functions_Group1 00438 * @{ 00439 */ 00440 /* Initialization/de-initialization functions **********************************/ 00441 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 00442 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif); 00443 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 00444 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 00445 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 00446 /** 00447 * @} 00448 */ 00449 00450 /** @addtogroup SPDIFRX_Exported_Functions_Group2 00451 * @{ 00452 */ 00453 /* I/O operation functions ***************************************************/ 00454 /* Blocking mode: Polling */ 00455 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 00456 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 00457 00458 /* Non-Blocking mode: Interrupt */ 00459 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00460 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00461 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 00462 00463 /* Non-Blocking mode: DMA */ 00464 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00465 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00466 00467 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 00468 00469 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 00470 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00471 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00472 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 00473 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00474 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00475 /** 00476 * @} 00477 */ 00478 00479 /** @addtogroup SPDIFRX_Exported_Functions_Group3 00480 * @{ 00481 */ 00482 /* Peripheral Control and State functions ************************************/ 00483 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif); 00484 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif); 00485 /** 00486 * @} 00487 */ 00488 00489 /** 00490 * @} 00491 */ 00492 /* Private types -------------------------------------------------------------*/ 00493 /* Private variables ---------------------------------------------------------*/ 00494 /* Private constants ---------------------------------------------------------*/ 00495 /* Private macros ------------------------------------------------------------*/ 00496 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 00497 * @{ 00498 */ 00499 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 00500 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 00501 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 00502 ((INPUT) == SPDIFRX_INPUT_IN0)) 00503 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 00504 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 00505 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 00506 ((RET) == SPDIFRX_MAXRETRIES_63)) 00507 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 00508 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 00509 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 00510 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 00511 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 00512 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 00513 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 00514 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 00515 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 00516 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 00517 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 00518 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 00519 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 00520 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 00521 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 00522 00523 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 00524 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 00525 /** 00526 * @} 00527 */ 00528 00529 /* Private functions ---------------------------------------------------------*/ 00530 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 00531 * @{ 00532 */ 00533 /** 00534 * @} 00535 */ 00536 00537 /** 00538 * @} 00539 */ 00540 00541 /** 00542 * @} 00543 */ 00544 #endif /* STM32F446xx */ 00545 00546 #ifdef __cplusplus 00547 } 00548 #endif 00549 00550 00551 #endif /* __STM32F4xx_HAL_SPDIFRX_H */ 00552 00553 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/