STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_sdram.h 00004 * @author MCD Application Team 00005 * @brief Header file of SDRAM HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_SDRAM_H 00038 #define __STM32F4xx_HAL_SDRAM_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 00045 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 00046 00047 /* Includes ------------------------------------------------------------------*/ 00048 #include "stm32f4xx_ll_fmc.h" 00049 00050 /** @addtogroup STM32F4xx_HAL_Driver 00051 * @{ 00052 */ 00053 00054 /** @addtogroup SDRAM 00055 * @{ 00056 */ 00057 00058 /* Exported typedef ----------------------------------------------------------*/ 00059 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types 00060 * @{ 00061 */ 00062 00063 /** 00064 * @brief HAL SDRAM State structure definition 00065 */ 00066 typedef enum 00067 { 00068 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ 00069 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ 00070 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ 00071 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ 00072 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ 00073 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ 00074 00075 }HAL_SDRAM_StateTypeDef; 00076 00077 /** 00078 * @brief SDRAM handle Structure definition 00079 */ 00080 typedef struct 00081 { 00082 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ 00083 00084 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ 00085 00086 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ 00087 00088 HAL_LockTypeDef Lock; /*!< SDRAM locking object */ 00089 00090 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 00091 00092 }SDRAM_HandleTypeDef; 00093 /** 00094 * @} 00095 */ 00096 00097 /* Exported constants --------------------------------------------------------*/ 00098 /* Exported macro ------------------------------------------------------------*/ 00099 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros 00100 * @{ 00101 */ 00102 00103 /** @brief Reset SDRAM handle state 00104 * @param __HANDLE__ specifies the SDRAM handle. 00105 * @retval None 00106 */ 00107 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) 00108 /** 00109 * @} 00110 */ 00111 00112 /* Exported functions --------------------------------------------------------*/ 00113 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions 00114 * @{ 00115 */ 00116 00117 /** @addtogroup SDRAM_Exported_Functions_Group1 00118 * @{ 00119 */ 00120 00121 /* Initialization/de-initialization functions *********************************/ 00122 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); 00123 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); 00124 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); 00125 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); 00126 00127 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); 00128 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); 00129 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 00130 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 00131 /** 00132 * @} 00133 */ 00134 00135 /** @addtogroup SDRAM_Exported_Functions_Group2 00136 * @{ 00137 */ 00138 /* I/O operation functions ****************************************************/ 00139 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); 00140 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); 00141 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); 00142 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); 00143 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 00144 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 00145 00146 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 00147 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 00148 /** 00149 * @} 00150 */ 00151 00152 /** @addtogroup SDRAM_Exported_Functions_Group3 00153 * @{ 00154 */ 00155 /* SDRAM Control functions *****************************************************/ 00156 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); 00157 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); 00158 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); 00159 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); 00160 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); 00161 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); 00162 /** 00163 * @} 00164 */ 00165 00166 /** @addtogroup SDRAM_Exported_Functions_Group4 00167 * @{ 00168 */ 00169 /* SDRAM State functions ********************************************************/ 00170 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); 00171 /** 00172 * @} 00173 */ 00174 00175 /** 00176 * @} 00177 */ 00178 00179 /** 00180 * @} 00181 */ 00182 00183 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 00184 00185 /** 00186 * @} 00187 */ 00188 00189 #ifdef __cplusplus 00190 } 00191 #endif 00192 00193 #endif /* __STM32F4xx_HAL_SDRAM_H */ 00194 00195 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/