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STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_pwr.h 00004 * @author MCD Application Team 00005 * @brief Header file of PWR HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_PWR_H 00038 #define __STM32F4xx_HAL_PWR_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32f4xx_hal_def.h" 00046 00047 /** @addtogroup STM32F4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup PWR 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 00057 /** @defgroup PWR_Exported_Types PWR Exported Types 00058 * @{ 00059 */ 00060 00061 /** 00062 * @brief PWR PVD configuration structure definition 00063 */ 00064 typedef struct 00065 { 00066 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 00067 This parameter can be a value of @ref PWR_PVD_detection_level */ 00068 00069 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 00070 This parameter can be a value of @ref PWR_PVD_Mode */ 00071 }PWR_PVDTypeDef; 00072 00073 /** 00074 * @} 00075 */ 00076 00077 /* Exported constants --------------------------------------------------------*/ 00078 /** @defgroup PWR_Exported_Constants PWR Exported Constants 00079 * @{ 00080 */ 00081 00082 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 00083 * @{ 00084 */ 00085 #define PWR_WAKEUP_PIN1 0x00000100U 00086 /** 00087 * @} 00088 */ 00089 00090 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 00091 * @{ 00092 */ 00093 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 00094 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 00095 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 00096 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 00097 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 00098 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 00099 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 00100 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 00101 (Compare internally to VREFINT) */ 00102 /** 00103 * @} 00104 */ 00105 00106 /** @defgroup PWR_PVD_Mode PWR PVD Mode 00107 * @{ 00108 */ 00109 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 00110 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 00111 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 00112 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 00113 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 00114 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 00115 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 00116 /** 00117 * @} 00118 */ 00119 00120 00121 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 00122 * @{ 00123 */ 00124 #define PWR_MAINREGULATOR_ON 0x00000000U 00125 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 00126 /** 00127 * @} 00128 */ 00129 00130 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 00131 * @{ 00132 */ 00133 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 00134 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 00135 /** 00136 * @} 00137 */ 00138 00139 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 00140 * @{ 00141 */ 00142 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 00143 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 00144 /** 00145 * @} 00146 */ 00147 00148 /** @defgroup PWR_Flag PWR Flag 00149 * @{ 00150 */ 00151 #define PWR_FLAG_WU PWR_CSR_WUF 00152 #define PWR_FLAG_SB PWR_CSR_SBF 00153 #define PWR_FLAG_PVDO PWR_CSR_PVDO 00154 #define PWR_FLAG_BRR PWR_CSR_BRR 00155 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 00156 /** 00157 * @} 00158 */ 00159 00160 /** 00161 * @} 00162 */ 00163 00164 /* Exported macro ------------------------------------------------------------*/ 00165 /** @defgroup PWR_Exported_Macro PWR Exported Macro 00166 * @{ 00167 */ 00168 00169 /** @brief Check PWR flag is set or not. 00170 * @param __FLAG__ specifies the flag to check. 00171 * This parameter can be one of the following values: 00172 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 00173 * was received from the WKUP pin or from the RTC alarm (Alarm A 00174 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 00175 * An additional wakeup event is detected if the WKUP pin is enabled 00176 * (by setting the EWUP bit) when the WKUP pin level is already high. 00177 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 00178 * resumed from StandBy mode. 00179 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 00180 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 00181 * For this reason, this bit is equal to 0 after Standby or reset 00182 * until the PVDE bit is set. 00183 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 00184 * when the device wakes up from Standby mode or by a system reset 00185 * or power reset. 00186 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 00187 * scaling output selection is ready. 00188 * @retval The new state of __FLAG__ (TRUE or FALSE). 00189 */ 00190 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 00191 00192 /** @brief Clear the PWR's pending flags. 00193 * @param __FLAG__ specifies the flag to clear. 00194 * This parameter can be one of the following values: 00195 * @arg PWR_FLAG_WU: Wake Up flag 00196 * @arg PWR_FLAG_SB: StandBy flag 00197 */ 00198 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 00199 00200 /** 00201 * @brief Enable the PVD Exti Line 16. 00202 * @retval None. 00203 */ 00204 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 00205 00206 /** 00207 * @brief Disable the PVD EXTI Line 16. 00208 * @retval None. 00209 */ 00210 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 00211 00212 /** 00213 * @brief Enable event on PVD Exti Line 16. 00214 * @retval None. 00215 */ 00216 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 00217 00218 /** 00219 * @brief Disable event on PVD Exti Line 16. 00220 * @retval None. 00221 */ 00222 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 00223 00224 /** 00225 * @brief Enable the PVD Extended Interrupt Rising Trigger. 00226 * @retval None. 00227 */ 00228 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 00229 00230 /** 00231 * @brief Disable the PVD Extended Interrupt Rising Trigger. 00232 * @retval None. 00233 */ 00234 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 00235 00236 /** 00237 * @brief Enable the PVD Extended Interrupt Falling Trigger. 00238 * @retval None. 00239 */ 00240 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 00241 00242 00243 /** 00244 * @brief Disable the PVD Extended Interrupt Falling Trigger. 00245 * @retval None. 00246 */ 00247 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 00248 00249 00250 /** 00251 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 00252 * @retval None. 00253 */ 00254 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 00255 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 00256 }while(0U) 00257 00258 /** 00259 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 00260 * This parameter can be: 00261 * @retval None. 00262 */ 00263 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 00264 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 00265 }while(0U) 00266 00267 /** 00268 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 00269 * @retval EXTI PVD Line Status. 00270 */ 00271 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 00272 00273 /** 00274 * @brief Clear the PVD Exti flag. 00275 * @retval None. 00276 */ 00277 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 00278 00279 /** 00280 * @brief Generates a Software interrupt on PVD EXTI line. 00281 * @retval None 00282 */ 00283 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 00284 00285 /** 00286 * @} 00287 */ 00288 00289 /* Include PWR HAL Extension module */ 00290 #include "stm32f4xx_hal_pwr_ex.h" 00291 00292 /* Exported functions --------------------------------------------------------*/ 00293 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 00294 * @{ 00295 */ 00296 00297 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 00298 * @{ 00299 */ 00300 /* Initialization and de-initialization functions *****************************/ 00301 void HAL_PWR_DeInit(void); 00302 void HAL_PWR_EnableBkUpAccess(void); 00303 void HAL_PWR_DisableBkUpAccess(void); 00304 /** 00305 * @} 00306 */ 00307 00308 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 00309 * @{ 00310 */ 00311 /* Peripheral Control functions **********************************************/ 00312 /* PVD configuration */ 00313 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 00314 void HAL_PWR_EnablePVD(void); 00315 void HAL_PWR_DisablePVD(void); 00316 00317 /* WakeUp pins configuration */ 00318 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 00319 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 00320 00321 /* Low Power modes entry */ 00322 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 00323 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 00324 void HAL_PWR_EnterSTANDBYMode(void); 00325 00326 /* Power PVD IRQ Handler */ 00327 void HAL_PWR_PVD_IRQHandler(void); 00328 void HAL_PWR_PVDCallback(void); 00329 00330 /* Cortex System Control functions *******************************************/ 00331 void HAL_PWR_EnableSleepOnExit(void); 00332 void HAL_PWR_DisableSleepOnExit(void); 00333 void HAL_PWR_EnableSEVOnPend(void); 00334 void HAL_PWR_DisableSEVOnPend(void); 00335 /** 00336 * @} 00337 */ 00338 00339 /** 00340 * @} 00341 */ 00342 00343 /* Private types -------------------------------------------------------------*/ 00344 /* Private variables ---------------------------------------------------------*/ 00345 /* Private constants ---------------------------------------------------------*/ 00346 /** @defgroup PWR_Private_Constants PWR Private Constants 00347 * @{ 00348 */ 00349 00350 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 00351 * @{ 00352 */ 00353 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 00354 /** 00355 * @} 00356 */ 00357 00358 /** @defgroup PWR_register_alias_address PWR Register alias address 00359 * @{ 00360 */ 00361 /* ------------- PWR registers bit address in the alias region ---------------*/ 00362 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 00363 #define PWR_CR_OFFSET 0x00U 00364 #define PWR_CSR_OFFSET 0x04U 00365 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 00366 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 00367 /** 00368 * @} 00369 */ 00370 00371 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 00372 * @{ 00373 */ 00374 /* --- CR Register ---*/ 00375 /* Alias word address of DBP bit */ 00376 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos 00377 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 00378 00379 /* Alias word address of PVDE bit */ 00380 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos 00381 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 00382 00383 /* Alias word address of VOS bit */ 00384 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos 00385 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) 00386 /** 00387 * @} 00388 */ 00389 00390 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 00391 * @{ 00392 */ 00393 /* --- CSR Register ---*/ 00394 /* Alias word address of EWUP bit */ 00395 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos 00396 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 00397 /** 00398 * @} 00399 */ 00400 00401 /** 00402 * @} 00403 */ 00404 /* Private macros ------------------------------------------------------------*/ 00405 /** @defgroup PWR_Private_Macros PWR Private Macros 00406 * @{ 00407 */ 00408 00409 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 00410 * @{ 00411 */ 00412 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 00413 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 00414 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 00415 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 00416 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 00417 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 00418 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 00419 ((MODE) == PWR_PVD_MODE_NORMAL)) 00420 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 00421 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 00422 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 00423 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 00424 /** 00425 * @} 00426 */ 00427 00428 /** 00429 * @} 00430 */ 00431 00432 /** 00433 * @} 00434 */ 00435 00436 /** 00437 * @} 00438 */ 00439 00440 #ifdef __cplusplus 00441 } 00442 #endif 00443 00444 00445 #endif /* __STM32F4xx_HAL_PWR_H */ 00446 00447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1