|
STM32F439xx HAL User Manual
|
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_nand.h 00004 * @author MCD Application Team 00005 * @brief Header file of NAND HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_NAND_H 00038 #define __STM32F4xx_HAL_NAND_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) 00046 #include "stm32f4xx_ll_fsmc.h" 00047 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 00048 00049 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 00050 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 00051 #include "stm32f4xx_ll_fmc.h" 00052 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\ 00053 STM32F479xx */ 00054 00055 /** @addtogroup STM32F4xx_HAL_Driver 00056 * @{ 00057 */ 00058 00059 /** @addtogroup NAND 00060 * @{ 00061 */ 00062 00063 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ 00064 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 00065 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 00066 00067 /* Exported typedef ----------------------------------------------------------*/ 00068 /* Exported types ------------------------------------------------------------*/ 00069 /** @defgroup NAND_Exported_Types NAND Exported Types 00070 * @{ 00071 */ 00072 00073 /** 00074 * @brief HAL NAND State structures definition 00075 */ 00076 typedef enum 00077 { 00078 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */ 00079 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */ 00080 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */ 00081 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */ 00082 }HAL_NAND_StateTypeDef; 00083 00084 /** 00085 * @brief NAND Memory electronic signature Structure definition 00086 */ 00087 typedef struct 00088 { 00089 /*<! NAND memory electronic signature maker and device IDs */ 00090 00091 uint8_t Maker_Id; 00092 00093 uint8_t Device_Id; 00094 00095 uint8_t Third_Id; 00096 00097 uint8_t Fourth_Id; 00098 }NAND_IDTypeDef; 00099 00100 /** 00101 * @brief NAND Memory address Structure definition 00102 */ 00103 typedef struct 00104 { 00105 uint16_t Page; /*!< NAND memory Page address */ 00106 00107 uint16_t Plane; /*!< NAND memory Plane address */ 00108 00109 uint16_t Block; /*!< NAND memory Block address */ 00110 00111 }NAND_AddressTypeDef; 00112 00113 /** 00114 * @brief NAND Memory info Structure definition 00115 */ 00116 typedef struct 00117 { 00118 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes 00119 for 8 bits adressing or words for 16 bits addressing */ 00120 00121 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes 00122 for 8 bits adressing or words for 16 bits addressing */ 00123 00124 uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */ 00125 00126 uint32_t BlockNbr; /*!< NAND memory number of total blocks */ 00127 00128 uint32_t PlaneNbr; /*!< NAND memory number of planes */ 00129 00130 uint32_t PlaneSize; /*!< NAND memory plane size measured in number of blocks */ 00131 00132 FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This 00133 parameter is mandatory for some NAND parts after the read 00134 command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence. 00135 Example: Toshiba THTH58BYG3S0HBAI6. 00136 This parameter could be ENABLE or DISABLE 00137 Please check the Read Mode sequnece in the NAND device datasheet */ 00138 }NAND_DeviceConfigTypeDef; 00139 00140 /** 00141 * @brief NAND handle Structure definition 00142 */ 00143 typedef struct 00144 { 00145 FMC_NAND_TypeDef *Instance; /*!< Register base address */ 00146 00147 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ 00148 00149 HAL_LockTypeDef Lock; /*!< NAND locking object */ 00150 00151 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */ 00152 00153 NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */ 00154 00155 }NAND_HandleTypeDef; 00156 /** 00157 * @} 00158 */ 00159 00160 /* Exported constants --------------------------------------------------------*/ 00161 /* Exported macros ------------------------------------------------------------*/ 00162 /** @defgroup NAND_Exported_Macros NAND Exported Macros 00163 * @{ 00164 */ 00165 00166 /** @brief Reset NAND handle state 00167 * @param __HANDLE__ specifies the NAND handle. 00168 * @retval None 00169 */ 00170 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) 00171 00172 /** 00173 * @} 00174 */ 00175 00176 /* Exported functions --------------------------------------------------------*/ 00177 /** @addtogroup NAND_Exported_Functions NAND Exported Functions 00178 * @{ 00179 */ 00180 00181 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions 00182 * @{ 00183 */ 00184 00185 /* Initialization/de-initialization functions ********************************/ 00186 /* Initialization/de-initialization functions ********************************/ 00187 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); 00188 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); 00189 00190 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig); 00191 00192 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); 00193 00194 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); 00195 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); 00196 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); 00197 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); 00198 00199 /** 00200 * @} 00201 */ 00202 00203 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions 00204 * @{ 00205 */ 00206 00207 /* IO operation functions ****************************************************/ 00208 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); 00209 00210 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead); 00211 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite); 00212 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead); 00213 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); 00214 00215 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead); 00216 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite); 00217 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead); 00218 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite); 00219 00220 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); 00221 00222 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); 00223 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); 00224 00225 /** 00226 * @} 00227 */ 00228 00229 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions 00230 * @{ 00231 */ 00232 00233 /* NAND Control functions ****************************************************/ 00234 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); 00235 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); 00236 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout); 00237 00238 /** 00239 * @} 00240 */ 00241 00242 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions 00243 * @{ 00244 */ 00245 /* NAND State functions *******************************************************/ 00246 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand); 00247 /** 00248 * @} 00249 */ 00250 00251 /** 00252 * @} 00253 */ 00254 00255 /* Private types -------------------------------------------------------------*/ 00256 /* Private variables ---------------------------------------------------------*/ 00257 /* Private constants ---------------------------------------------------------*/ 00258 /** @defgroup NAND_Private_Constants NAND Private Constants 00259 * @{ 00260 */ 00261 #define NAND_DEVICE1 0x70000000U 00262 #define NAND_DEVICE2 0x80000000U 00263 #define NAND_WRITE_TIMEOUT 0x01000000U 00264 00265 #define CMD_AREA ((uint32_t)(1U<<16U)) /* A16 = CLE high */ 00266 #define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17 = ALE high */ 00267 00268 #define NAND_CMD_AREA_A ((uint8_t)0x00) 00269 #define NAND_CMD_AREA_B ((uint8_t)0x01) 00270 #define NAND_CMD_AREA_C ((uint8_t)0x50) 00271 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) 00272 00273 #define NAND_CMD_WRITE0 ((uint8_t)0x80) 00274 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) 00275 #define NAND_CMD_ERASE0 ((uint8_t)0x60) 00276 #define NAND_CMD_ERASE1 ((uint8_t)0xD0) 00277 #define NAND_CMD_READID ((uint8_t)0x90) 00278 #define NAND_CMD_STATUS ((uint8_t)0x70) 00279 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) 00280 #define NAND_CMD_RESET ((uint8_t)0xFF) 00281 00282 /* NAND memory status */ 00283 #define NAND_VALID_ADDRESS 0x00000100U 00284 #define NAND_INVALID_ADDRESS 0x00000200U 00285 #define NAND_TIMEOUT_ERROR 0x00000400U 00286 #define NAND_BUSY 0x00000000U 00287 #define NAND_ERROR 0x00000001U 00288 #define NAND_READY 0x00000040U 00289 /** 00290 * @} 00291 */ 00292 00293 /* Private macros ------------------------------------------------------------*/ 00294 /** @defgroup NAND_Private_Macros NAND Private Macros 00295 * @{ 00296 */ 00297 00298 /** 00299 * @brief NAND memory address computation. 00300 * @param __ADDRESS__ NAND memory address. 00301 * @param __HANDLE__ NAND handle. 00302 * @retval NAND Raw address value 00303 */ 00304 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \ 00305 (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize))) 00306 00307 /** 00308 * @brief NAND memory Column address computation. 00309 * @param __HANDLE__ NAND handle. 00310 * @retval NAND Raw address value 00311 */ 00312 #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize) 00313 00314 /** 00315 * @brief NAND memory address cycling. 00316 * @param __ADDRESS__ NAND memory address. 00317 * @retval NAND address cycling value. 00318 */ 00319 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ 00320 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ 00321 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ 00322 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ 00323 00324 /** 00325 * @brief NAND memory Columns cycling. 00326 * @param __ADDRESS__ NAND memory address. 00327 * @retval NAND Column address cycling value. 00328 */ 00329 #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */ 00330 #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */ 00331 00332 /** 00333 * @} 00334 */ 00335 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\ 00336 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\ 00337 STM32F446xx || STM32F469xx || STM32F479xx */ 00338 00339 /** 00340 * @} 00341 */ 00342 /** 00343 * @} 00344 */ 00345 00346 /** 00347 * @} 00348 */ 00349 00350 #ifdef __cplusplus 00351 } 00352 #endif 00353 00354 #endif /* __STM32F4xx_HAL_NAND_H */ 00355 00356 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1