STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_i2c.c 00004 * @author MCD Application Team 00005 * @brief I2C HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Inter Integrated Circuit (I2C) peripheral: 00008 * + Initialization and de-initialization functions 00009 * + IO operation functions 00010 * + Peripheral State, Mode and Error functions 00011 * 00012 @verbatim 00013 ============================================================================== 00014 ##### How to use this driver ##### 00015 ============================================================================== 00016 [..] 00017 The I2C HAL driver can be used as follows: 00018 00019 (#) Declare a I2C_HandleTypeDef handle structure, for example: 00020 I2C_HandleTypeDef hi2c; 00021 00022 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: 00023 (##) Enable the I2Cx interface clock 00024 (##) I2C pins configuration 00025 (+++) Enable the clock for the I2C GPIOs 00026 (+++) Configure I2C pins as alternate function open-drain 00027 (##) NVIC configuration if you need to use interrupt process 00028 (+++) Configure the I2Cx interrupt priority 00029 (+++) Enable the NVIC I2C IRQ Channel 00030 (##) DMA Configuration if you need to use DMA process 00031 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream 00032 (+++) Enable the DMAx interface clock using 00033 (+++) Configure the DMA handle parameters 00034 (+++) Configure the DMA Tx or Rx Stream 00035 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle 00036 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on 00037 the DMA Tx or Rx Stream 00038 00039 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1, 00040 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure. 00041 00042 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware 00043 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. 00044 00045 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() 00046 00047 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : 00048 00049 *** Polling mode IO operation *** 00050 ================================= 00051 [..] 00052 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() 00053 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() 00054 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() 00055 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() 00056 00057 *** Polling mode IO MEM operation *** 00058 ===================================== 00059 [..] 00060 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() 00061 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() 00062 00063 00064 *** Interrupt mode IO operation *** 00065 =================================== 00066 [..] 00067 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT() 00068 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can 00069 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback 00070 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT() 00071 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can 00072 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback 00073 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT() 00074 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can 00075 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback 00076 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT() 00077 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can 00078 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback 00079 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can 00080 add his own code by customization of function pointer HAL_I2C_ErrorCallback 00081 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() 00082 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can 00083 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() 00084 00085 *** Interrupt mode IO sequential operation *** 00086 ============================================== 00087 [..] 00088 (@) These interfaces allow to manage a sequential transfer with a repeated start condition 00089 when a direction change during transfer 00090 [..] 00091 (+) A specific option field manage the different steps of a sequential transfer 00092 (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: 00093 (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode 00094 (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address 00095 and data to transfer without a final stop condition 00096 (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address 00097 and with new data to transfer if the direction change or manage only the new data to transfer 00098 if no direction change and without a final stop condition in both cases 00099 (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address 00100 and with new data to transfer if the direction change or manage only the new data to transfer 00101 if no direction change and with a final stop condition in both cases 00102 00103 (+) Differents sequential I2C interfaces are listed below: 00104 (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT() 00105 (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can 00106 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() 00107 (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT() 00108 (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can 00109 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() 00110 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() 00111 (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can 00112 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() 00113 (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT() 00114 (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can 00115 add his own code to check the Address Match Code and the transmission direction request by master (Write/Read). 00116 (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can 00117 add his own code by customization of function pointer HAL_I2C_ListenCpltCallback() 00118 (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT() 00119 (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can 00120 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() 00121 (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT() 00122 (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can 00123 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() 00124 (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can 00125 add his own code by customization of function pointer HAL_I2C_ErrorCallback() 00126 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() 00127 (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can 00128 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() 00129 00130 *** Interrupt mode IO MEM operation *** 00131 ======================================= 00132 [..] 00133 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using 00134 HAL_I2C_Mem_Write_IT() 00135 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can 00136 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback 00137 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using 00138 HAL_I2C_Mem_Read_IT() 00139 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can 00140 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback 00141 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can 00142 add his own code by customization of function pointer HAL_I2C_ErrorCallback 00143 00144 *** DMA mode IO operation *** 00145 ============================== 00146 [..] 00147 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using 00148 HAL_I2C_Master_Transmit_DMA() 00149 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can 00150 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback 00151 (+) Receive in master mode an amount of data in non blocking mode (DMA) using 00152 HAL_I2C_Master_Receive_DMA() 00153 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can 00154 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback 00155 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using 00156 HAL_I2C_Slave_Transmit_DMA() 00157 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can 00158 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback 00159 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using 00160 HAL_I2C_Slave_Receive_DMA() 00161 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can 00162 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback 00163 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can 00164 add his own code by customization of function pointer HAL_I2C_ErrorCallback 00165 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() 00166 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can 00167 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() 00168 00169 *** DMA mode IO MEM operation *** 00170 ================================= 00171 [..] 00172 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using 00173 HAL_I2C_Mem_Write_DMA() 00174 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can 00175 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback 00176 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using 00177 HAL_I2C_Mem_Read_DMA() 00178 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can 00179 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback 00180 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can 00181 add his own code by customization of function pointer HAL_I2C_ErrorCallback 00182 00183 00184 *** I2C HAL driver macros list *** 00185 ================================== 00186 [..] 00187 Below the list of most used macros in I2C HAL driver. 00188 00189 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral 00190 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral 00191 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not 00192 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag 00193 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt 00194 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt 00195 00196 [..] 00197 (@) You can refer to the I2C HAL driver header file for more useful macros 00198 00199 00200 @endverbatim 00201 ****************************************************************************** 00202 * @attention 00203 * 00204 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00205 * 00206 * Redistribution and use in source and binary forms, with or without modification, 00207 * are permitted provided that the following conditions are met: 00208 * 1. Redistributions of source code must retain the above copyright notice, 00209 * this list of conditions and the following disclaimer. 00210 * 2. Redistributions in binary form must reproduce the above copyright notice, 00211 * this list of conditions and the following disclaimer in the documentation 00212 * and/or other materials provided with the distribution. 00213 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00214 * may be used to endorse or promote products derived from this software 00215 * without specific prior written permission. 00216 * 00217 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00218 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00219 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00220 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00221 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00222 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00223 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00224 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00225 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00226 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00227 * 00228 ****************************************************************************** 00229 */ 00230 00231 /* Includes ------------------------------------------------------------------*/ 00232 #include "stm32f4xx_hal.h" 00233 00234 /** @addtogroup STM32F4xx_HAL_Driver 00235 * @{ 00236 */ 00237 00238 /** @defgroup I2C I2C 00239 * @brief I2C HAL module driver 00240 * @{ 00241 */ 00242 00243 #ifdef HAL_I2C_MODULE_ENABLED 00244 00245 /* Private typedef -----------------------------------------------------------*/ 00246 /* Private define ------------------------------------------------------------*/ 00247 /** @addtogroup I2C_Private_Define 00248 * @{ 00249 */ 00250 #define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */ 00251 #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */ 00252 #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */ 00253 00254 /* Private define for @ref PreviousState usage */ 00255 #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */ 00256 #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */ 00257 #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */ 00258 #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */ 00259 #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ 00260 #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ 00261 00262 /** 00263 * @} 00264 */ 00265 00266 /* Private macro -------------------------------------------------------------*/ 00267 /* Private variables ---------------------------------------------------------*/ 00268 /* Private function prototypes -----------------------------------------------*/ 00269 /** @addtogroup I2C_Private_Functions 00270 * @{ 00271 */ 00272 /* Private functions to handle DMA transfer */ 00273 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma); 00274 static void I2C_DMAError(DMA_HandleTypeDef *hdma); 00275 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); 00276 00277 static void I2C_ITError(I2C_HandleTypeDef *hi2c); 00278 00279 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart); 00280 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart); 00281 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); 00282 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); 00283 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart); 00284 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart); 00285 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); 00286 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); 00287 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); 00288 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); 00289 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c); 00290 00291 /* Private functions for I2C transfer IRQ handler */ 00292 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c); 00293 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c); 00294 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c); 00295 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c); 00296 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c); 00297 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c); 00298 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c); 00299 00300 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c); 00301 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c); 00302 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c); 00303 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c); 00304 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c); 00305 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c); 00306 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c); 00307 /** 00308 * @} 00309 */ 00310 00311 /* Exported functions --------------------------------------------------------*/ 00312 /** @defgroup I2C_Exported_Functions I2C Exported Functions 00313 * @{ 00314 */ 00315 00316 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 00317 * @brief Initialization and Configuration functions 00318 * 00319 @verbatim 00320 =============================================================================== 00321 ##### Initialization and de-initialization functions ##### 00322 =============================================================================== 00323 [..] This subsection provides a set of functions allowing to initialize and 00324 de-initialize the I2Cx peripheral: 00325 00326 (+) User must Implement HAL_I2C_MspInit() function in which he configures 00327 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC). 00328 00329 (+) Call the function HAL_I2C_Init() to configure the selected device with 00330 the selected configuration: 00331 (++) Communication Speed 00332 (++) Duty cycle 00333 (++) Addressing mode 00334 (++) Own Address 1 00335 (++) Dual Addressing mode 00336 (++) Own Address 2 00337 (++) General call mode 00338 (++) Nostretch mode 00339 00340 (+) Call the function HAL_I2C_DeInit() to restore the default configuration 00341 of the selected I2Cx peripheral. 00342 00343 @endverbatim 00344 * @{ 00345 */ 00346 00347 /** 00348 * @brief Initializes the I2C according to the specified parameters 00349 * in the I2C_InitTypeDef and create the associated handle. 00350 * @param hi2c pointer to a I2C_HandleTypeDef structure that contains 00351 * the configuration information for I2C module 00352 * @retval HAL status 00353 */ 00354 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) 00355 { 00356 uint32_t freqrange = 0U; 00357 uint32_t pclk1 = 0U; 00358 00359 /* Check the I2C handle allocation */ 00360 if(hi2c == NULL) 00361 { 00362 return HAL_ERROR; 00363 } 00364 00365 /* Check the parameters */ 00366 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); 00367 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed)); 00368 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle)); 00369 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); 00370 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); 00371 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); 00372 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); 00373 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); 00374 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); 00375 00376 if(hi2c->State == HAL_I2C_STATE_RESET) 00377 { 00378 /* Allocate lock resource and initialize it */ 00379 hi2c->Lock = HAL_UNLOCKED; 00380 /* Init the low level hardware : GPIO, CLOCK, NVIC */ 00381 HAL_I2C_MspInit(hi2c); 00382 } 00383 00384 hi2c->State = HAL_I2C_STATE_BUSY; 00385 00386 /* Disable the selected I2C peripheral */ 00387 __HAL_I2C_DISABLE(hi2c); 00388 00389 /* Get PCLK1 frequency */ 00390 pclk1 = HAL_RCC_GetPCLK1Freq(); 00391 00392 /* Calculate frequency range */ 00393 freqrange = I2C_FREQRANGE(pclk1); 00394 00395 /*---------------------------- I2Cx CR2 Configuration ----------------------*/ 00396 /* Configure I2Cx: Frequency range */ 00397 hi2c->Instance->CR2 = freqrange; 00398 00399 /*---------------------------- I2Cx TRISE Configuration --------------------*/ 00400 /* Configure I2Cx: Rise Time */ 00401 hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 00402 00403 /*---------------------------- I2Cx CCR Configuration ----------------------*/ 00404 /* Configure I2Cx: Speed */ 00405 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 00406 00407 /*---------------------------- I2Cx CR1 Configuration ----------------------*/ 00408 /* Configure I2Cx: Generalcall and NoStretch mode */ 00409 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 00410 00411 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ 00412 /* Configure I2Cx: Own Address1 and addressing mode */ 00413 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 00414 00415 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ 00416 /* Configure I2Cx: Dual mode and Own Address2 */ 00417 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 00418 00419 /* Enable the selected I2C peripheral */ 00420 __HAL_I2C_ENABLE(hi2c); 00421 00422 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 00423 hi2c->State = HAL_I2C_STATE_READY; 00424 hi2c->PreviousState = I2C_STATE_NONE; 00425 hi2c->Mode = HAL_I2C_MODE_NONE; 00426 00427 return HAL_OK; 00428 } 00429 00430 /** 00431 * @brief DeInitializes the I2C peripheral. 00432 * @param hi2c pointer to a I2C_HandleTypeDef structure that contains 00433 * the configuration information for I2C module 00434 * @retval HAL status 00435 */ 00436 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) 00437 { 00438 /* Check the I2C handle allocation */ 00439 if(hi2c == NULL) 00440 { 00441 return HAL_ERROR; 00442 } 00443 00444 /* Check the parameters */ 00445 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); 00446 00447 hi2c->State = HAL_I2C_STATE_BUSY; 00448 00449 /* Disable the I2C Peripheral Clock */ 00450 __HAL_I2C_DISABLE(hi2c); 00451 00452 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ 00453 HAL_I2C_MspDeInit(hi2c); 00454 00455 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 00456 hi2c->State = HAL_I2C_STATE_RESET; 00457 hi2c->PreviousState = I2C_STATE_NONE; 00458 hi2c->Mode = HAL_I2C_MODE_NONE; 00459 00460 /* Release Lock */ 00461 __HAL_UNLOCK(hi2c); 00462 00463 return HAL_OK; 00464 } 00465 00466 /** 00467 * @brief I2C MSP Init. 00468 * @param hi2c pointer to a I2C_HandleTypeDef structure that contains 00469 * the configuration information for I2C module 00470 * @retval None 00471 */ 00472 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) 00473 { 00474 /* Prevent unused argument(s) compilation warning */ 00475 UNUSED(hi2c); 00476 /* NOTE : This function Should not be modified, when the callback is needed, 00477 the HAL_I2C_MspInit could be implemented in the user file 00478 */ 00479 } 00480 00481 /** 00482 * @brief I2C MSP DeInit 00483 * @param hi2c pointer to a I2C_HandleTypeDef structure that contains 00484 * the configuration information for I2C module 00485 * @retval None 00486 */ 00487 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) 00488 { 00489 /* Prevent unused argument(s) compilation warning */ 00490 UNUSED(hi2c); 00491 /* NOTE : This function Should not be modified, when the callback is needed, 00492 the HAL_I2C_MspDeInit could be implemented in the user file 00493 */ 00494 } 00495 00496 /** 00497 * @} 00498 */ 00499 00500 /** @defgroup I2C_Exported_Functions_Group2 IO operation functions 00501 * @brief Data transfers functions 00502 * 00503 @verbatim 00504 =============================================================================== 00505 ##### IO operation functions ##### 00506 =============================================================================== 00507 [..] 00508 This subsection provides a set of functions allowing to manage the I2C data 00509 transfers. 00510 00511 (#) There are two modes of transfer: 00512 (++) Blocking mode : The communication is performed in the polling mode. 00513 The status of all data processing is returned by the same function 00514 after finishing transfer. 00515 (++) No-Blocking mode : The communication is performed using Interrupts 00516 or DMA. These functions return the status of the transfer startup. 00517 The end of the data processing will be indicated through the 00518 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when 00519 using DMA mode. 00520 00521 (#) Blocking mode functions are : 00522 (++) HAL_I2C_Master_Transmit() 00523 (++) HAL_I2C_Master_Receive() 00524 (++) HAL_I2C_Slave_Transmit() 00525 (++) HAL_I2C_Slave_Receive() 00526 (++) HAL_I2C_Mem_Write() 00527 (++) HAL_I2C_Mem_Read() 00528 (++) HAL_I2C_IsDeviceReady() 00529 00530 (#) No-Blocking mode functions with Interrupt are : 00531 (++) HAL_I2C_Master_Transmit_IT() 00532 (++) HAL_I2C_Master_Receive_IT() 00533 (++) HAL_I2C_Slave_Transmit_IT() 00534 (++) HAL_I2C_Slave_Receive_IT() 00535 (++) HAL_I2C_Master_Sequential_Transmit_IT() 00536 (++) HAL_I2C_Master_Sequential_Receive_IT() 00537 (++) HAL_I2C_Slave_Sequential_Transmit_IT() 00538 (++) HAL_I2C_Slave_Sequential_Receive_IT() 00539 (++) HAL_I2C_Mem_Write_IT() 00540 (++) HAL_I2C_Mem_Read_IT() 00541 00542 (#) No-Blocking mode functions with DMA are : 00543 (++) HAL_I2C_Master_Transmit_DMA() 00544 (++) HAL_I2C_Master_Receive_DMA() 00545 (++) HAL_I2C_Slave_Transmit_DMA() 00546 (++) HAL_I2C_Slave_Receive_DMA() 00547 (++) HAL_I2C_Mem_Write_DMA() 00548 (++) HAL_I2C_Mem_Read_DMA() 00549 00550 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: 00551 (++) HAL_I2C_MemTxCpltCallback() 00552 (++) HAL_I2C_MemRxCpltCallback() 00553 (++) HAL_I2C_MasterTxCpltCallback() 00554 (++) HAL_I2C_MasterRxCpltCallback() 00555 (++) HAL_I2C_SlaveTxCpltCallback() 00556 (++) HAL_I2C_SlaveRxCpltCallback() 00557 (++) HAL_I2C_ErrorCallback() 00558 (++) HAL_I2C_AbortCpltCallback() 00559 00560 @endverbatim 00561 * @{ 00562 */ 00563 00564 /** 00565 * @brief Transmits in master mode an amount of data in blocking mode. 00566 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 00567 * the configuration information for the specified I2C. 00568 * @param DevAddress Target device address The device 7 bits address value 00569 * in datasheet must be shifted to the left before calling the interface 00570 * @param pData Pointer to data buffer 00571 * @param Size Amount of data to be sent 00572 * @param Timeout Timeout duration 00573 * @retval HAL status 00574 */ 00575 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) 00576 { 00577 uint32_t tickstart = 0x00U; 00578 00579 /* Init tickstart for timeout management*/ 00580 tickstart = HAL_GetTick(); 00581 00582 if(hi2c->State == HAL_I2C_STATE_READY) 00583 { 00584 /* Wait until BUSY flag is reset */ 00585 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 00586 { 00587 return HAL_BUSY; 00588 } 00589 00590 /* Process Locked */ 00591 __HAL_LOCK(hi2c); 00592 00593 /* Check if the I2C is already enabled */ 00594 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 00595 { 00596 /* Enable I2C peripheral */ 00597 __HAL_I2C_ENABLE(hi2c); 00598 } 00599 00600 /* Disable Pos */ 00601 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 00602 00603 hi2c->State = HAL_I2C_STATE_BUSY_TX; 00604 hi2c->Mode = HAL_I2C_MODE_MASTER; 00605 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 00606 00607 /* Prepare transfer parameters */ 00608 hi2c->pBuffPtr = pData; 00609 hi2c->XferCount = Size; 00610 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 00611 hi2c->XferSize = hi2c->XferCount; 00612 00613 /* Send Slave Address */ 00614 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) 00615 { 00616 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 00617 { 00618 /* Process Unlocked */ 00619 __HAL_UNLOCK(hi2c); 00620 return HAL_ERROR; 00621 } 00622 else 00623 { 00624 /* Process Unlocked */ 00625 __HAL_UNLOCK(hi2c); 00626 return HAL_TIMEOUT; 00627 } 00628 } 00629 00630 /* Clear ADDR flag */ 00631 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00632 00633 while(hi2c->XferSize > 0U) 00634 { 00635 /* Wait until TXE flag is set */ 00636 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 00637 { 00638 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 00639 { 00640 /* Generate Stop */ 00641 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00642 return HAL_ERROR; 00643 } 00644 else 00645 { 00646 return HAL_TIMEOUT; 00647 } 00648 } 00649 00650 /* Write data to DR */ 00651 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 00652 hi2c->XferCount--; 00653 hi2c->XferSize--; 00654 00655 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 00656 { 00657 /* Write data to DR */ 00658 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 00659 hi2c->XferCount--; 00660 hi2c->XferSize--; 00661 } 00662 00663 /* Wait until BTF flag is set */ 00664 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 00665 { 00666 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 00667 { 00668 /* Generate Stop */ 00669 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00670 return HAL_ERROR; 00671 } 00672 else 00673 { 00674 return HAL_TIMEOUT; 00675 } 00676 } 00677 } 00678 00679 /* Generate Stop */ 00680 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00681 00682 hi2c->State = HAL_I2C_STATE_READY; 00683 hi2c->Mode = HAL_I2C_MODE_NONE; 00684 00685 /* Process Unlocked */ 00686 __HAL_UNLOCK(hi2c); 00687 00688 return HAL_OK; 00689 } 00690 else 00691 { 00692 return HAL_BUSY; 00693 } 00694 } 00695 00696 /** 00697 * @brief Receives in master mode an amount of data in blocking mode. 00698 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 00699 * the configuration information for the specified I2C. 00700 * @param DevAddress Target device address The device 7 bits address value 00701 * in datasheet must be shifted to the left before calling the interface 00702 * @param pData Pointer to data buffer 00703 * @param Size Amount of data to be sent 00704 * @param Timeout Timeout duration 00705 * @retval HAL status 00706 */ 00707 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) 00708 { 00709 uint32_t tickstart = 0x00U; 00710 00711 /* Init tickstart for timeout management*/ 00712 tickstart = HAL_GetTick(); 00713 00714 if(hi2c->State == HAL_I2C_STATE_READY) 00715 { 00716 /* Wait until BUSY flag is reset */ 00717 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 00718 { 00719 return HAL_BUSY; 00720 } 00721 00722 /* Process Locked */ 00723 __HAL_LOCK(hi2c); 00724 00725 /* Check if the I2C is already enabled */ 00726 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 00727 { 00728 /* Enable I2C peripheral */ 00729 __HAL_I2C_ENABLE(hi2c); 00730 } 00731 00732 /* Disable Pos */ 00733 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 00734 00735 hi2c->State = HAL_I2C_STATE_BUSY_RX; 00736 hi2c->Mode = HAL_I2C_MODE_MASTER; 00737 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 00738 00739 /* Prepare transfer parameters */ 00740 hi2c->pBuffPtr = pData; 00741 hi2c->XferCount = Size; 00742 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 00743 hi2c->XferSize = hi2c->XferCount; 00744 00745 /* Send Slave Address */ 00746 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) 00747 { 00748 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 00749 { 00750 /* Process Unlocked */ 00751 __HAL_UNLOCK(hi2c); 00752 return HAL_ERROR; 00753 } 00754 else 00755 { 00756 /* Process Unlocked */ 00757 __HAL_UNLOCK(hi2c); 00758 return HAL_TIMEOUT; 00759 } 00760 } 00761 00762 if(hi2c->XferSize == 0U) 00763 { 00764 /* Clear ADDR flag */ 00765 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00766 00767 /* Generate Stop */ 00768 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00769 } 00770 else if(hi2c->XferSize == 1U) 00771 { 00772 /* Disable Acknowledge */ 00773 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 00774 00775 /* Clear ADDR flag */ 00776 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00777 00778 /* Generate Stop */ 00779 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00780 } 00781 else if(hi2c->XferSize == 2U) 00782 { 00783 /* Disable Acknowledge */ 00784 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 00785 00786 /* Enable Pos */ 00787 hi2c->Instance->CR1 |= I2C_CR1_POS; 00788 00789 /* Clear ADDR flag */ 00790 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00791 } 00792 else 00793 { 00794 /* Enable Acknowledge */ 00795 hi2c->Instance->CR1 |= I2C_CR1_ACK; 00796 00797 /* Clear ADDR flag */ 00798 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00799 } 00800 00801 while(hi2c->XferSize > 0U) 00802 { 00803 if(hi2c->XferSize <= 3U) 00804 { 00805 /* One byte */ 00806 if(hi2c->XferSize == 1U) 00807 { 00808 /* Wait until RXNE flag is set */ 00809 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 00810 { 00811 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 00812 { 00813 return HAL_TIMEOUT; 00814 } 00815 else 00816 { 00817 return HAL_ERROR; 00818 } 00819 } 00820 00821 /* Read data from DR */ 00822 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00823 hi2c->XferSize--; 00824 hi2c->XferCount--; 00825 } 00826 /* Two bytes */ 00827 else if(hi2c->XferSize == 2U) 00828 { 00829 /* Wait until BTF flag is set */ 00830 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 00831 { 00832 return HAL_TIMEOUT; 00833 } 00834 00835 /* Generate Stop */ 00836 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00837 00838 /* Read data from DR */ 00839 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00840 hi2c->XferSize--; 00841 hi2c->XferCount--; 00842 00843 /* Read data from DR */ 00844 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00845 hi2c->XferSize--; 00846 hi2c->XferCount--; 00847 } 00848 /* 3 Last bytes */ 00849 else 00850 { 00851 /* Wait until BTF flag is set */ 00852 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 00853 { 00854 return HAL_TIMEOUT; 00855 } 00856 00857 /* Disable Acknowledge */ 00858 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 00859 00860 /* Read data from DR */ 00861 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00862 hi2c->XferSize--; 00863 hi2c->XferCount--; 00864 00865 /* Wait until BTF flag is set */ 00866 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 00867 { 00868 return HAL_TIMEOUT; 00869 } 00870 00871 /* Generate Stop */ 00872 hi2c->Instance->CR1 |= I2C_CR1_STOP; 00873 00874 /* Read data from DR */ 00875 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00876 hi2c->XferSize--; 00877 hi2c->XferCount--; 00878 00879 /* Read data from DR */ 00880 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00881 hi2c->XferSize--; 00882 hi2c->XferCount--; 00883 } 00884 } 00885 else 00886 { 00887 /* Wait until RXNE flag is set */ 00888 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 00889 { 00890 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 00891 { 00892 return HAL_TIMEOUT; 00893 } 00894 else 00895 { 00896 return HAL_ERROR; 00897 } 00898 } 00899 00900 /* Read data from DR */ 00901 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00902 hi2c->XferSize--; 00903 hi2c->XferCount--; 00904 00905 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 00906 { 00907 /* Read data from DR */ 00908 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 00909 hi2c->XferSize--; 00910 hi2c->XferCount--; 00911 } 00912 } 00913 } 00914 00915 hi2c->State = HAL_I2C_STATE_READY; 00916 hi2c->Mode = HAL_I2C_MODE_NONE; 00917 00918 /* Process Unlocked */ 00919 __HAL_UNLOCK(hi2c); 00920 00921 return HAL_OK; 00922 } 00923 else 00924 { 00925 return HAL_BUSY; 00926 } 00927 } 00928 00929 /** 00930 * @brief Transmits in slave mode an amount of data in blocking mode. 00931 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 00932 * the configuration information for the specified I2C. 00933 * @param pData Pointer to data buffer 00934 * @param Size Amount of data to be sent 00935 * @param Timeout Timeout duration 00936 * @retval HAL status 00937 */ 00938 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) 00939 { 00940 uint32_t tickstart = 0x00U; 00941 00942 /* Init tickstart for timeout management*/ 00943 tickstart = HAL_GetTick(); 00944 00945 if(hi2c->State == HAL_I2C_STATE_READY) 00946 { 00947 if((pData == NULL) || (Size == 0U)) 00948 { 00949 return HAL_ERROR; 00950 } 00951 00952 /* Process Locked */ 00953 __HAL_LOCK(hi2c); 00954 00955 /* Check if the I2C is already enabled */ 00956 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 00957 { 00958 /* Enable I2C peripheral */ 00959 __HAL_I2C_ENABLE(hi2c); 00960 } 00961 00962 /* Disable Pos */ 00963 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 00964 00965 hi2c->State = HAL_I2C_STATE_BUSY_TX; 00966 hi2c->Mode = HAL_I2C_MODE_SLAVE; 00967 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 00968 00969 /* Prepare transfer parameters */ 00970 hi2c->pBuffPtr = pData; 00971 hi2c->XferCount = Size; 00972 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 00973 hi2c->XferSize = hi2c->XferCount; 00974 00975 /* Enable Address Acknowledge */ 00976 hi2c->Instance->CR1 |= I2C_CR1_ACK; 00977 00978 /* Wait until ADDR flag is set */ 00979 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) 00980 { 00981 return HAL_TIMEOUT; 00982 } 00983 00984 /* Clear ADDR flag */ 00985 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00986 00987 /* If 10bit addressing mode is selected */ 00988 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) 00989 { 00990 /* Wait until ADDR flag is set */ 00991 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) 00992 { 00993 return HAL_TIMEOUT; 00994 } 00995 00996 /* Clear ADDR flag */ 00997 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 00998 } 00999 01000 while(hi2c->XferSize > 0U) 01001 { 01002 /* Wait until TXE flag is set */ 01003 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 01004 { 01005 /* Disable Address Acknowledge */ 01006 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01007 01008 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 01009 { 01010 return HAL_ERROR; 01011 } 01012 else 01013 { 01014 return HAL_TIMEOUT; 01015 } 01016 } 01017 01018 /* Write data to DR */ 01019 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 01020 hi2c->XferCount--; 01021 hi2c->XferSize--; 01022 01023 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 01024 { 01025 /* Write data to DR */ 01026 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 01027 hi2c->XferCount--; 01028 hi2c->XferSize--; 01029 } 01030 } 01031 01032 /* Wait until AF flag is set */ 01033 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) 01034 { 01035 return HAL_TIMEOUT; 01036 } 01037 01038 /* Clear AF flag */ 01039 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 01040 01041 /* Disable Address Acknowledge */ 01042 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01043 01044 hi2c->State = HAL_I2C_STATE_READY; 01045 hi2c->Mode = HAL_I2C_MODE_NONE; 01046 01047 /* Process Unlocked */ 01048 __HAL_UNLOCK(hi2c); 01049 01050 return HAL_OK; 01051 } 01052 else 01053 { 01054 return HAL_BUSY; 01055 } 01056 } 01057 01058 /** 01059 * @brief Receive in slave mode an amount of data in blocking mode 01060 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01061 * the configuration information for the specified I2C. 01062 * @param pData Pointer to data buffer 01063 * @param Size Amount of data to be sent 01064 * @param Timeout Timeout duration 01065 * @retval HAL status 01066 */ 01067 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) 01068 { 01069 uint32_t tickstart = 0x00U; 01070 01071 /* Init tickstart for timeout management*/ 01072 tickstart = HAL_GetTick(); 01073 01074 if(hi2c->State == HAL_I2C_STATE_READY) 01075 { 01076 if((pData == NULL) || (Size == 0)) 01077 { 01078 return HAL_ERROR; 01079 } 01080 01081 /* Process Locked */ 01082 __HAL_LOCK(hi2c); 01083 01084 /* Check if the I2C is already enabled */ 01085 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01086 { 01087 /* Enable I2C peripheral */ 01088 __HAL_I2C_ENABLE(hi2c); 01089 } 01090 01091 /* Disable Pos */ 01092 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01093 01094 hi2c->State = HAL_I2C_STATE_BUSY_RX; 01095 hi2c->Mode = HAL_I2C_MODE_SLAVE; 01096 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01097 01098 /* Prepare transfer parameters */ 01099 hi2c->pBuffPtr = pData; 01100 hi2c->XferCount = Size; 01101 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01102 hi2c->XferSize = hi2c->XferCount; 01103 01104 /* Enable Address Acknowledge */ 01105 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01106 01107 /* Wait until ADDR flag is set */ 01108 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) 01109 { 01110 return HAL_TIMEOUT; 01111 } 01112 01113 /* Clear ADDR flag */ 01114 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 01115 01116 while(hi2c->XferSize > 0U) 01117 { 01118 /* Wait until RXNE flag is set */ 01119 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 01120 { 01121 /* Disable Address Acknowledge */ 01122 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01123 01124 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 01125 { 01126 return HAL_TIMEOUT; 01127 } 01128 else 01129 { 01130 return HAL_ERROR; 01131 } 01132 } 01133 01134 /* Read data from DR */ 01135 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 01136 hi2c->XferSize--; 01137 hi2c->XferCount--; 01138 01139 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U)) 01140 { 01141 /* Read data from DR */ 01142 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 01143 hi2c->XferSize--; 01144 hi2c->XferCount--; 01145 } 01146 } 01147 01148 /* Wait until STOP flag is set */ 01149 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 01150 { 01151 /* Disable Address Acknowledge */ 01152 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01153 01154 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 01155 { 01156 return HAL_ERROR; 01157 } 01158 else 01159 { 01160 return HAL_TIMEOUT; 01161 } 01162 } 01163 01164 /* Clear STOP flag */ 01165 __HAL_I2C_CLEAR_STOPFLAG(hi2c); 01166 01167 /* Disable Address Acknowledge */ 01168 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01169 01170 hi2c->State = HAL_I2C_STATE_READY; 01171 hi2c->Mode = HAL_I2C_MODE_NONE; 01172 01173 /* Process Unlocked */ 01174 __HAL_UNLOCK(hi2c); 01175 01176 return HAL_OK; 01177 } 01178 else 01179 { 01180 return HAL_BUSY; 01181 } 01182 } 01183 01184 /** 01185 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt 01186 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01187 * the configuration information for the specified I2C. 01188 * @param DevAddress Target device address The device 7 bits address value 01189 * in datasheet must be shifted to the left before calling the interface 01190 * @param pData Pointer to data buffer 01191 * @param Size Amount of data to be sent 01192 * @retval HAL status 01193 */ 01194 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) 01195 { 01196 __IO uint32_t count = 0U; 01197 01198 if(hi2c->State == HAL_I2C_STATE_READY) 01199 { 01200 /* Wait until BUSY flag is reset */ 01201 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01202 do 01203 { 01204 if(count-- == 0U) 01205 { 01206 hi2c->PreviousState = I2C_STATE_NONE; 01207 hi2c->State= HAL_I2C_STATE_READY; 01208 01209 /* Process Unlocked */ 01210 __HAL_UNLOCK(hi2c); 01211 01212 return HAL_TIMEOUT; 01213 } 01214 } 01215 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01216 01217 /* Process Locked */ 01218 __HAL_LOCK(hi2c); 01219 01220 /* Check if the I2C is already enabled */ 01221 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01222 { 01223 /* Enable I2C peripheral */ 01224 __HAL_I2C_ENABLE(hi2c); 01225 } 01226 01227 /* Disable Pos */ 01228 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01229 01230 hi2c->State = HAL_I2C_STATE_BUSY_TX; 01231 hi2c->Mode = HAL_I2C_MODE_MASTER; 01232 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01233 01234 /* Prepare transfer parameters */ 01235 hi2c->pBuffPtr = pData; 01236 hi2c->XferCount = Size; 01237 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01238 hi2c->XferSize = hi2c->XferCount; 01239 hi2c->Devaddress = DevAddress; 01240 01241 /* Generate Start */ 01242 hi2c->Instance->CR1 |= I2C_CR1_START; 01243 01244 /* Process Unlocked */ 01245 __HAL_UNLOCK(hi2c); 01246 01247 /* Note : The I2C interrupts must be enabled after unlocking current process 01248 to avoid the risk of I2C interrupt handle execution before current 01249 process unlock */ 01250 /* Enable EVT, BUF and ERR interrupt */ 01251 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01252 01253 return HAL_OK; 01254 } 01255 else 01256 { 01257 return HAL_BUSY; 01258 } 01259 } 01260 01261 /** 01262 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt 01263 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01264 * the configuration information for the specified I2C. 01265 * @param DevAddress Target device address The device 7 bits address value 01266 * in datasheet must be shifted to the left before calling the interface 01267 * @param pData Pointer to data buffer 01268 * @param Size Amount of data to be sent 01269 * @retval HAL status 01270 */ 01271 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) 01272 { 01273 __IO uint32_t count = 0U; 01274 01275 if(hi2c->State == HAL_I2C_STATE_READY) 01276 { 01277 /* Wait until BUSY flag is reset */ 01278 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01279 do 01280 { 01281 if(count-- == 0U) 01282 { 01283 hi2c->PreviousState = I2C_STATE_NONE; 01284 hi2c->State= HAL_I2C_STATE_READY; 01285 01286 /* Process Unlocked */ 01287 __HAL_UNLOCK(hi2c); 01288 01289 return HAL_TIMEOUT; 01290 } 01291 } 01292 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01293 01294 /* Process Locked */ 01295 __HAL_LOCK(hi2c); 01296 01297 /* Check if the I2C is already enabled */ 01298 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01299 { 01300 /* Enable I2C peripheral */ 01301 __HAL_I2C_ENABLE(hi2c); 01302 } 01303 01304 /* Disable Pos */ 01305 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01306 01307 hi2c->State = HAL_I2C_STATE_BUSY_RX; 01308 hi2c->Mode = HAL_I2C_MODE_MASTER; 01309 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01310 01311 /* Prepare transfer parameters */ 01312 hi2c->pBuffPtr = pData; 01313 hi2c->XferCount = Size; 01314 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01315 hi2c->XferSize = hi2c->XferCount; 01316 hi2c->Devaddress = DevAddress; 01317 01318 /* Enable Acknowledge */ 01319 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01320 01321 /* Generate Start */ 01322 hi2c->Instance->CR1 |= I2C_CR1_START; 01323 01324 /* Process Unlocked */ 01325 __HAL_UNLOCK(hi2c); 01326 01327 /* Note : The I2C interrupts must be enabled after unlocking current process 01328 to avoid the risk of I2C interrupt handle execution before current 01329 process unlock */ 01330 01331 /* Enable EVT, BUF and ERR interrupt */ 01332 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01333 01334 return HAL_OK; 01335 } 01336 else 01337 { 01338 return HAL_BUSY; 01339 } 01340 } 01341 01342 /** 01343 * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt 01344 * @note This interface allow to manage repeated start condition when a direction change during transfer 01345 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01346 * the configuration information for the specified I2C. 01347 * @param DevAddress Target device address The device 7 bits address value 01348 * in datasheet must be shifted to the left before calling the interface 01349 * @param pData Pointer to data buffer 01350 * @param Size Amount of data to be sent 01351 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition 01352 * @retval HAL status 01353 */ 01354 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) 01355 { 01356 __IO uint32_t Prev_State = 0x00U; 01357 __IO uint32_t count = 0x00U; 01358 01359 /* Check the parameters */ 01360 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); 01361 01362 if(hi2c->State == HAL_I2C_STATE_READY) 01363 { 01364 /* Check Busy Flag only if FIRST call of Master interface */ 01365 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME)) 01366 { 01367 /* Wait until BUSY flag is reset */ 01368 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01369 do 01370 { 01371 if(count-- == 0U) 01372 { 01373 hi2c->PreviousState = I2C_STATE_NONE; 01374 hi2c->State= HAL_I2C_STATE_READY; 01375 01376 /* Process Unlocked */ 01377 __HAL_UNLOCK(hi2c); 01378 01379 return HAL_TIMEOUT; 01380 } 01381 } 01382 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01383 } 01384 01385 /* Process Locked */ 01386 __HAL_LOCK(hi2c); 01387 01388 /* Check if the I2C is already enabled */ 01389 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01390 { 01391 /* Enable I2C peripheral */ 01392 __HAL_I2C_ENABLE(hi2c); 01393 } 01394 01395 /* Disable Pos */ 01396 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01397 01398 hi2c->State = HAL_I2C_STATE_BUSY_TX; 01399 hi2c->Mode = HAL_I2C_MODE_MASTER; 01400 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01401 01402 /* Prepare transfer parameters */ 01403 hi2c->pBuffPtr = pData; 01404 hi2c->XferCount = Size; 01405 hi2c->XferOptions = XferOptions; 01406 hi2c->XferSize = hi2c->XferCount; 01407 hi2c->Devaddress = DevAddress; 01408 01409 Prev_State = hi2c->PreviousState; 01410 01411 /* Generate Start */ 01412 if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE)) 01413 { 01414 /* Generate Start condition if first transfer */ 01415 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME)) 01416 { 01417 /* Generate Start */ 01418 hi2c->Instance->CR1 |= I2C_CR1_START; 01419 } 01420 else 01421 { 01422 /* Generate ReStart */ 01423 hi2c->Instance->CR1 |= I2C_CR1_START; 01424 } 01425 } 01426 01427 /* Process Unlocked */ 01428 __HAL_UNLOCK(hi2c); 01429 01430 /* Note : The I2C interrupts must be enabled after unlocking current process 01431 to avoid the risk of I2C interrupt handle execution before current 01432 process unlock */ 01433 01434 /* Enable EVT, BUF and ERR interrupt */ 01435 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01436 01437 return HAL_OK; 01438 } 01439 else 01440 { 01441 return HAL_BUSY; 01442 } 01443 } 01444 01445 /** 01446 * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt 01447 * @note This interface allow to manage repeated start condition when a direction change during transfer 01448 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01449 * the configuration information for the specified I2C. 01450 * @param DevAddress Target device address The device 7 bits address value 01451 * in datasheet must be shifted to the left before calling the interface 01452 * @param pData Pointer to data buffer 01453 * @param Size Amount of data to be sent 01454 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition 01455 * @retval HAL status 01456 */ 01457 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) 01458 { 01459 __IO uint32_t count = 0U; 01460 01461 /* Check the parameters */ 01462 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); 01463 01464 if(hi2c->State == HAL_I2C_STATE_READY) 01465 { 01466 /* Check Busy Flag only if FIRST call of Master interface */ 01467 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME)) 01468 { 01469 /* Wait until BUSY flag is reset */ 01470 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01471 do 01472 { 01473 if(count-- == 0U) 01474 { 01475 hi2c->PreviousState = I2C_STATE_NONE; 01476 hi2c->State= HAL_I2C_STATE_READY; 01477 01478 /* Process Unlocked */ 01479 __HAL_UNLOCK(hi2c); 01480 01481 return HAL_TIMEOUT; 01482 } 01483 } 01484 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01485 } 01486 01487 /* Process Locked */ 01488 __HAL_LOCK(hi2c); 01489 01490 /* Check if the I2C is already enabled */ 01491 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01492 { 01493 /* Enable I2C peripheral */ 01494 __HAL_I2C_ENABLE(hi2c); 01495 } 01496 01497 /* Disable Pos */ 01498 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01499 01500 hi2c->State = HAL_I2C_STATE_BUSY_RX; 01501 hi2c->Mode = HAL_I2C_MODE_MASTER; 01502 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01503 01504 /* Prepare transfer parameters */ 01505 hi2c->pBuffPtr = pData; 01506 hi2c->XferCount = Size; 01507 hi2c->XferOptions = XferOptions; 01508 hi2c->XferSize = hi2c->XferCount; 01509 hi2c->Devaddress = DevAddress; 01510 01511 if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE)) 01512 { 01513 /* Generate Start condition if first transfer */ 01514 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME)) 01515 { 01516 /* Enable Acknowledge */ 01517 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01518 01519 /* Generate Start */ 01520 hi2c->Instance->CR1 |= I2C_CR1_START; 01521 } 01522 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) 01523 { 01524 /* Enable Acknowledge */ 01525 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01526 01527 /* Generate ReStart */ 01528 hi2c->Instance->CR1 |= I2C_CR1_START; 01529 } 01530 } 01531 01532 /* Process Unlocked */ 01533 __HAL_UNLOCK(hi2c); 01534 01535 /* Note : The I2C interrupts must be enabled after unlocking current process 01536 to avoid the risk of I2C interrupt handle execution before current 01537 process unlock */ 01538 01539 /* Enable EVT, BUF and ERR interrupt */ 01540 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01541 01542 return HAL_OK; 01543 } 01544 else 01545 { 01546 return HAL_BUSY; 01547 } 01548 } 01549 01550 /** 01551 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt 01552 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01553 * the configuration information for the specified I2C. 01554 * @param pData Pointer to data buffer 01555 * @param Size Amount of data to be sent 01556 * @retval HAL status 01557 */ 01558 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) 01559 { 01560 __IO uint32_t count = 0U; 01561 01562 if(hi2c->State == HAL_I2C_STATE_READY) 01563 { 01564 if((pData == NULL) || (Size == 0U)) 01565 { 01566 return HAL_ERROR; 01567 } 01568 01569 /* Wait until BUSY flag is reset */ 01570 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01571 do 01572 { 01573 if(count-- == 0U) 01574 { 01575 hi2c->PreviousState = I2C_STATE_NONE; 01576 hi2c->State= HAL_I2C_STATE_READY; 01577 01578 /* Process Unlocked */ 01579 __HAL_UNLOCK(hi2c); 01580 01581 return HAL_TIMEOUT; 01582 } 01583 } 01584 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01585 01586 /* Process Locked */ 01587 __HAL_LOCK(hi2c); 01588 01589 /* Check if the I2C is already enabled */ 01590 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01591 { 01592 /* Enable I2C peripheral */ 01593 __HAL_I2C_ENABLE(hi2c); 01594 } 01595 01596 /* Disable Pos */ 01597 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01598 01599 hi2c->State = HAL_I2C_STATE_BUSY_TX; 01600 hi2c->Mode = HAL_I2C_MODE_SLAVE; 01601 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01602 01603 /* Prepare transfer parameters */ 01604 hi2c->pBuffPtr = pData; 01605 hi2c->XferCount = Size; 01606 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01607 hi2c->XferSize = hi2c->XferCount; 01608 01609 /* Enable Address Acknowledge */ 01610 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01611 01612 /* Process Unlocked */ 01613 __HAL_UNLOCK(hi2c); 01614 01615 /* Note : The I2C interrupts must be enabled after unlocking current process 01616 to avoid the risk of I2C interrupt handle execution before current 01617 process unlock */ 01618 01619 /* Enable EVT, BUF and ERR interrupt */ 01620 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01621 01622 return HAL_OK; 01623 } 01624 else 01625 { 01626 return HAL_BUSY; 01627 } 01628 } 01629 01630 /** 01631 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt 01632 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01633 * the configuration information for the specified I2C. 01634 * @param pData Pointer to data buffer 01635 * @param Size Amount of data to be sent 01636 * @retval HAL status 01637 */ 01638 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) 01639 { 01640 __IO uint32_t count = 0U; 01641 01642 if(hi2c->State == HAL_I2C_STATE_READY) 01643 { 01644 if((pData == NULL) || (Size == 0U)) 01645 { 01646 return HAL_ERROR; 01647 } 01648 01649 /* Wait until BUSY flag is reset */ 01650 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01651 do 01652 { 01653 if(count-- == 0U) 01654 { 01655 hi2c->PreviousState = I2C_STATE_NONE; 01656 hi2c->State= HAL_I2C_STATE_READY; 01657 01658 /* Process Unlocked */ 01659 __HAL_UNLOCK(hi2c); 01660 01661 return HAL_TIMEOUT; 01662 } 01663 } 01664 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01665 01666 /* Process Locked */ 01667 __HAL_LOCK(hi2c); 01668 01669 /* Check if the I2C is already enabled */ 01670 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01671 { 01672 /* Enable I2C peripheral */ 01673 __HAL_I2C_ENABLE(hi2c); 01674 } 01675 01676 /* Disable Pos */ 01677 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01678 01679 hi2c->State = HAL_I2C_STATE_BUSY_RX; 01680 hi2c->Mode = HAL_I2C_MODE_SLAVE; 01681 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01682 01683 /* Prepare transfer parameters */ 01684 hi2c->pBuffPtr = pData; 01685 hi2c->XferSize = Size; 01686 hi2c->XferCount = Size; 01687 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01688 01689 /* Enable Address Acknowledge */ 01690 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01691 01692 /* Process Unlocked */ 01693 __HAL_UNLOCK(hi2c); 01694 01695 /* Note : The I2C interrupts must be enabled after unlocking current process 01696 to avoid the risk of I2C interrupt handle execution before current 01697 process unlock */ 01698 01699 /* Enable EVT, BUF and ERR interrupt */ 01700 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01701 01702 return HAL_OK; 01703 } 01704 else 01705 { 01706 return HAL_BUSY; 01707 } 01708 } 01709 01710 /** 01711 * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt 01712 * @note This interface allow to manage repeated start condition when a direction change during transfer 01713 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01714 * the configuration information for I2C module 01715 * @param pData Pointer to data buffer 01716 * @param Size Amount of data to be sent 01717 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition 01718 * @retval HAL status 01719 */ 01720 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) 01721 { 01722 /* Check the parameters */ 01723 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); 01724 01725 if(hi2c->State == HAL_I2C_STATE_LISTEN) 01726 { 01727 if((pData == NULL) || (Size == 0U)) 01728 { 01729 return HAL_ERROR; 01730 } 01731 01732 /* Process Locked */ 01733 __HAL_LOCK(hi2c); 01734 01735 /* Check if the I2C is already enabled */ 01736 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01737 { 01738 /* Enable I2C peripheral */ 01739 __HAL_I2C_ENABLE(hi2c); 01740 } 01741 01742 /* Disable Pos */ 01743 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01744 01745 hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; 01746 hi2c->Mode = HAL_I2C_MODE_SLAVE; 01747 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01748 01749 /* Prepare transfer parameters */ 01750 hi2c->pBuffPtr = pData; 01751 hi2c->XferCount = Size; 01752 hi2c->XferOptions = XferOptions; 01753 hi2c->XferSize = hi2c->XferCount; 01754 01755 /* Clear ADDR flag */ 01756 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 01757 01758 /* Process Unlocked */ 01759 __HAL_UNLOCK(hi2c); 01760 01761 /* Note : The I2C interrupts must be enabled after unlocking current process 01762 to avoid the risk of I2C interrupt handle execution before current 01763 process unlock */ 01764 01765 /* Enable EVT, BUF and ERR interrupt */ 01766 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01767 01768 return HAL_OK; 01769 } 01770 else 01771 { 01772 return HAL_BUSY; 01773 } 01774 } 01775 01776 /** 01777 * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt 01778 * @note This interface allow to manage repeated start condition when a direction change during transfer 01779 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01780 * the configuration information for the specified I2C. 01781 * @param pData Pointer to data buffer 01782 * @param Size Amount of data to be sent 01783 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition 01784 * @retval HAL status 01785 */ 01786 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) 01787 { 01788 /* Check the parameters */ 01789 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); 01790 01791 if(hi2c->State == HAL_I2C_STATE_LISTEN) 01792 { 01793 if((pData == NULL) || (Size == 0U)) 01794 { 01795 return HAL_ERROR; 01796 } 01797 01798 /* Process Locked */ 01799 __HAL_LOCK(hi2c); 01800 01801 /* Check if the I2C is already enabled */ 01802 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01803 { 01804 /* Enable I2C peripheral */ 01805 __HAL_I2C_ENABLE(hi2c); 01806 } 01807 01808 /* Disable Pos */ 01809 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01810 01811 hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; 01812 hi2c->Mode = HAL_I2C_MODE_SLAVE; 01813 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01814 01815 /* Prepare transfer parameters */ 01816 hi2c->pBuffPtr = pData; 01817 hi2c->XferCount = Size; 01818 hi2c->XferOptions = XferOptions; 01819 hi2c->XferSize = hi2c->XferCount; 01820 01821 /* Clear ADDR flag */ 01822 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 01823 01824 /* Process Unlocked */ 01825 __HAL_UNLOCK(hi2c); 01826 01827 /* Note : The I2C interrupts must be enabled after unlocking current process 01828 to avoid the risk of I2C interrupt handle execution before current 01829 process unlock */ 01830 01831 /* Enable EVT, BUF and ERR interrupt */ 01832 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 01833 01834 return HAL_OK; 01835 } 01836 else 01837 { 01838 return HAL_BUSY; 01839 } 01840 } 01841 01842 /** 01843 * @brief Enable the Address listen mode with Interrupt. 01844 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01845 * the configuration information for the specified I2C. 01846 * @retval HAL status 01847 */ 01848 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) 01849 { 01850 if(hi2c->State == HAL_I2C_STATE_READY) 01851 { 01852 hi2c->State = HAL_I2C_STATE_LISTEN; 01853 01854 /* Check if the I2C is already enabled */ 01855 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01856 { 01857 /* Enable I2C peripheral */ 01858 __HAL_I2C_ENABLE(hi2c); 01859 } 01860 01861 /* Enable Address Acknowledge */ 01862 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01863 01864 /* Enable EVT and ERR interrupt */ 01865 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 01866 01867 return HAL_OK; 01868 } 01869 else 01870 { 01871 return HAL_BUSY; 01872 } 01873 } 01874 01875 /** 01876 * @brief Disable the Address listen mode with Interrupt. 01877 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01878 * the configuration information for the specified I2C. 01879 * @retval HAL status 01880 */ 01881 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) 01882 { 01883 /* Declaration of tmp to prevent undefined behavior of volatile usage */ 01884 uint32_t tmp; 01885 01886 /* Disable Address listen mode only if a transfer is not ongoing */ 01887 if(hi2c->State == HAL_I2C_STATE_LISTEN) 01888 { 01889 tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; 01890 hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); 01891 hi2c->State = HAL_I2C_STATE_READY; 01892 hi2c->Mode = HAL_I2C_MODE_NONE; 01893 01894 /* Disable Address Acknowledge */ 01895 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 01896 01897 /* Disable EVT and ERR interrupt */ 01898 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 01899 01900 return HAL_OK; 01901 } 01902 else 01903 { 01904 return HAL_BUSY; 01905 } 01906 } 01907 01908 /** 01909 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA 01910 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 01911 * the configuration information for the specified I2C. 01912 * @param DevAddress Target device address The device 7 bits address value 01913 * in datasheet must be shifted to the left before calling the interface 01914 * @param pData Pointer to data buffer 01915 * @param Size Amount of data to be sent 01916 * @retval HAL status 01917 */ 01918 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) 01919 { 01920 __IO uint32_t count = 0U; 01921 01922 if(hi2c->State == HAL_I2C_STATE_READY) 01923 { 01924 /* Wait until BUSY flag is reset */ 01925 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 01926 do 01927 { 01928 if(count-- == 0U) 01929 { 01930 hi2c->PreviousState = I2C_STATE_NONE; 01931 hi2c->State= HAL_I2C_STATE_READY; 01932 01933 /* Process Unlocked */ 01934 __HAL_UNLOCK(hi2c); 01935 01936 return HAL_TIMEOUT; 01937 } 01938 } 01939 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 01940 01941 /* Process Locked */ 01942 __HAL_LOCK(hi2c); 01943 01944 /* Check if the I2C is already enabled */ 01945 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 01946 { 01947 /* Enable I2C peripheral */ 01948 __HAL_I2C_ENABLE(hi2c); 01949 } 01950 01951 /* Disable Pos */ 01952 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 01953 01954 hi2c->State = HAL_I2C_STATE_BUSY_TX; 01955 hi2c->Mode = HAL_I2C_MODE_MASTER; 01956 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 01957 01958 /* Prepare transfer parameters */ 01959 hi2c->pBuffPtr = pData; 01960 hi2c->XferCount = Size; 01961 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 01962 hi2c->XferSize = hi2c->XferCount; 01963 hi2c->Devaddress = DevAddress; 01964 01965 if(hi2c->XferSize > 0U) 01966 { 01967 /* Set the I2C DMA transfer complete callback */ 01968 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt; 01969 01970 /* Set the DMA error callback */ 01971 hi2c->hdmatx->XferErrorCallback = I2C_DMAError; 01972 01973 /* Set the unused DMA callbacks to NULL */ 01974 hi2c->hdmatx->XferHalfCpltCallback = NULL; 01975 hi2c->hdmatx->XferM1CpltCallback = NULL; 01976 hi2c->hdmatx->XferM1HalfCpltCallback = NULL; 01977 hi2c->hdmatx->XferAbortCallback = NULL; 01978 01979 /* Enable the DMA Stream */ 01980 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize); 01981 01982 /* Enable Acknowledge */ 01983 hi2c->Instance->CR1 |= I2C_CR1_ACK; 01984 01985 /* Generate Start */ 01986 hi2c->Instance->CR1 |= I2C_CR1_START; 01987 01988 /* Process Unlocked */ 01989 __HAL_UNLOCK(hi2c); 01990 01991 /* Note : The I2C interrupts must be enabled after unlocking current process 01992 to avoid the risk of I2C interrupt handle execution before current 01993 process unlock */ 01994 01995 /* Enable EVT and ERR interrupt */ 01996 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 01997 01998 /* Enable DMA Request */ 01999 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 02000 } 02001 else 02002 { 02003 /* Enable Acknowledge */ 02004 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02005 02006 /* Generate Start */ 02007 hi2c->Instance->CR1 |= I2C_CR1_START; 02008 02009 /* Process Unlocked */ 02010 __HAL_UNLOCK(hi2c); 02011 02012 /* Note : The I2C interrupts must be enabled after unlocking current process 02013 to avoid the risk of I2C interrupt handle execution before current 02014 process unlock */ 02015 02016 /* Enable EVT, BUF and ERR interrupt */ 02017 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 02018 } 02019 02020 return HAL_OK; 02021 } 02022 else 02023 { 02024 return HAL_BUSY; 02025 } 02026 } 02027 02028 /** 02029 * @brief Receive in master mode an amount of data in non-blocking mode with DMA 02030 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02031 * the configuration information for the specified I2C. 02032 * @param DevAddress Target device address The device 7 bits address value 02033 * in datasheet must be shifted to the left before calling the interface 02034 * @param pData Pointer to data buffer 02035 * @param Size Amount of data to be sent 02036 * @retval HAL status 02037 */ 02038 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) 02039 { 02040 __IO uint32_t count = 0U; 02041 02042 if(hi2c->State == HAL_I2C_STATE_READY) 02043 { 02044 /* Wait until BUSY flag is reset */ 02045 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02046 do 02047 { 02048 if(count-- == 0U) 02049 { 02050 hi2c->PreviousState = I2C_STATE_NONE; 02051 hi2c->State= HAL_I2C_STATE_READY; 02052 02053 /* Process Unlocked */ 02054 __HAL_UNLOCK(hi2c); 02055 02056 return HAL_TIMEOUT; 02057 } 02058 } 02059 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02060 02061 /* Process Locked */ 02062 __HAL_LOCK(hi2c); 02063 02064 /* Check if the I2C is already enabled */ 02065 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02066 { 02067 /* Enable I2C peripheral */ 02068 __HAL_I2C_ENABLE(hi2c); 02069 } 02070 02071 /* Disable Pos */ 02072 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02073 02074 hi2c->State = HAL_I2C_STATE_BUSY_RX; 02075 hi2c->Mode = HAL_I2C_MODE_MASTER; 02076 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02077 02078 /* Prepare transfer parameters */ 02079 hi2c->pBuffPtr = pData; 02080 hi2c->XferCount = Size; 02081 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02082 hi2c->XferSize = hi2c->XferCount; 02083 hi2c->Devaddress = DevAddress; 02084 02085 if(hi2c->XferSize > 0U) 02086 { 02087 /* Set the I2C DMA transfer complete callback */ 02088 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt; 02089 02090 /* Set the DMA error callback */ 02091 hi2c->hdmarx->XferErrorCallback = I2C_DMAError; 02092 02093 /* Set the unused DMA callbacks to NULL */ 02094 hi2c->hdmarx->XferHalfCpltCallback = NULL; 02095 hi2c->hdmarx->XferM1CpltCallback = NULL; 02096 hi2c->hdmarx->XferM1HalfCpltCallback = NULL; 02097 hi2c->hdmarx->XferAbortCallback = NULL; 02098 02099 /* Enable the DMA Stream */ 02100 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); 02101 02102 /* Enable Acknowledge */ 02103 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02104 02105 /* Generate Start */ 02106 hi2c->Instance->CR1 |= I2C_CR1_START; 02107 02108 /* Process Unlocked */ 02109 __HAL_UNLOCK(hi2c); 02110 02111 /* Note : The I2C interrupts must be enabled after unlocking current process 02112 to avoid the risk of I2C interrupt handle execution before current 02113 process unlock */ 02114 02115 /* Enable EVT and ERR interrupt */ 02116 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 02117 02118 /* Enable DMA Request */ 02119 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 02120 } 02121 else 02122 { 02123 /* Enable Acknowledge */ 02124 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02125 02126 /* Generate Start */ 02127 hi2c->Instance->CR1 |= I2C_CR1_START; 02128 02129 /* Process Unlocked */ 02130 __HAL_UNLOCK(hi2c); 02131 02132 /* Note : The I2C interrupts must be enabled after unlocking current process 02133 to avoid the risk of I2C interrupt handle execution before current 02134 process unlock */ 02135 02136 /* Enable EVT, BUF and ERR interrupt */ 02137 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 02138 } 02139 02140 return HAL_OK; 02141 } 02142 else 02143 { 02144 return HAL_BUSY; 02145 } 02146 } 02147 02148 /** 02149 * @brief Abort a master I2C process communication with Interrupt. 02150 * @note This abort can be called only if state is ready 02151 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02152 * the configuration information for the specified I2C. 02153 * @param DevAddress Target device address The device 7 bits address value 02154 * in datasheet must be shifted to the left before calling the interface 02155 * @retval HAL status 02156 */ 02157 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) 02158 { 02159 /* Prevent unused argument(s) compilation warning */ 02160 UNUSED(DevAddress); 02161 02162 /* Abort Master transfer during Receive or Transmit process */ 02163 if(hi2c->Mode == HAL_I2C_MODE_MASTER) 02164 { 02165 /* Process Locked */ 02166 __HAL_LOCK(hi2c); 02167 02168 hi2c->PreviousState = I2C_STATE_NONE; 02169 hi2c->State = HAL_I2C_STATE_ABORT; 02170 02171 /* Disable Acknowledge */ 02172 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 02173 02174 /* Generate Stop */ 02175 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02176 02177 hi2c->XferCount = 0U; 02178 02179 /* Disable EVT, BUF and ERR interrupt */ 02180 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 02181 02182 /* Process Unlocked */ 02183 __HAL_UNLOCK(hi2c); 02184 02185 /* Call the corresponding callback to inform upper layer of End of Transfer */ 02186 I2C_ITError(hi2c); 02187 02188 return HAL_OK; 02189 } 02190 else 02191 { 02192 /* Wrong usage of abort function */ 02193 /* This function should be used only in case of abort monitored by master device */ 02194 return HAL_ERROR; 02195 } 02196 } 02197 02198 /** 02199 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA 02200 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02201 * the configuration information for the specified I2C. 02202 * @param pData Pointer to data buffer 02203 * @param Size Amount of data to be sent 02204 * @retval HAL status 02205 */ 02206 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) 02207 { 02208 __IO uint32_t count = 0U; 02209 02210 if(hi2c->State == HAL_I2C_STATE_READY) 02211 { 02212 if((pData == NULL) || (Size == 0U)) 02213 { 02214 return HAL_ERROR; 02215 } 02216 02217 /* Wait until BUSY flag is reset */ 02218 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02219 do 02220 { 02221 if(count-- == 0U) 02222 { 02223 hi2c->PreviousState = I2C_STATE_NONE; 02224 hi2c->State= HAL_I2C_STATE_READY; 02225 02226 /* Process Unlocked */ 02227 __HAL_UNLOCK(hi2c); 02228 02229 return HAL_TIMEOUT; 02230 } 02231 } 02232 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02233 02234 /* Process Locked */ 02235 __HAL_LOCK(hi2c); 02236 02237 /* Check if the I2C is already enabled */ 02238 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02239 { 02240 /* Enable I2C peripheral */ 02241 __HAL_I2C_ENABLE(hi2c); 02242 } 02243 02244 /* Disable Pos */ 02245 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02246 02247 hi2c->State = HAL_I2C_STATE_BUSY_TX; 02248 hi2c->Mode = HAL_I2C_MODE_SLAVE; 02249 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02250 02251 /* Prepare transfer parameters */ 02252 hi2c->pBuffPtr = pData; 02253 hi2c->XferCount = Size; 02254 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02255 hi2c->XferSize = hi2c->XferCount; 02256 02257 /* Set the I2C DMA transfer complete callback */ 02258 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt; 02259 02260 /* Set the DMA error callback */ 02261 hi2c->hdmatx->XferErrorCallback = I2C_DMAError; 02262 02263 /* Set the unused DMA callbacks to NULL */ 02264 hi2c->hdmatx->XferHalfCpltCallback = NULL; 02265 hi2c->hdmatx->XferM1CpltCallback = NULL; 02266 hi2c->hdmatx->XferM1HalfCpltCallback = NULL; 02267 hi2c->hdmatx->XferAbortCallback = NULL; 02268 02269 /* Enable the DMA Stream */ 02270 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize); 02271 02272 /* Enable Address Acknowledge */ 02273 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02274 02275 /* Process Unlocked */ 02276 __HAL_UNLOCK(hi2c); 02277 02278 /* Note : The I2C interrupts must be enabled after unlocking current process 02279 to avoid the risk of I2C interrupt handle execution before current 02280 process unlock */ 02281 /* Enable EVT and ERR interrupt */ 02282 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 02283 02284 /* Enable DMA Request */ 02285 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 02286 02287 return HAL_OK; 02288 } 02289 else 02290 { 02291 return HAL_BUSY; 02292 } 02293 } 02294 02295 /** 02296 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA 02297 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02298 * the configuration information for the specified I2C. 02299 * @param pData Pointer to data buffer 02300 * @param Size Amount of data to be sent 02301 * @retval HAL status 02302 */ 02303 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) 02304 { 02305 __IO uint32_t count = 0U; 02306 02307 if(hi2c->State == HAL_I2C_STATE_READY) 02308 { 02309 if((pData == NULL) || (Size == 0U)) 02310 { 02311 return HAL_ERROR; 02312 } 02313 02314 /* Wait until BUSY flag is reset */ 02315 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02316 do 02317 { 02318 if(count-- == 0U) 02319 { 02320 hi2c->PreviousState = I2C_STATE_NONE; 02321 hi2c->State= HAL_I2C_STATE_READY; 02322 02323 /* Process Unlocked */ 02324 __HAL_UNLOCK(hi2c); 02325 02326 return HAL_TIMEOUT; 02327 } 02328 } 02329 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02330 02331 /* Process Locked */ 02332 __HAL_LOCK(hi2c); 02333 02334 /* Check if the I2C is already enabled */ 02335 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02336 { 02337 /* Enable I2C peripheral */ 02338 __HAL_I2C_ENABLE(hi2c); 02339 } 02340 02341 /* Disable Pos */ 02342 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02343 02344 hi2c->State = HAL_I2C_STATE_BUSY_RX; 02345 hi2c->Mode = HAL_I2C_MODE_SLAVE; 02346 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02347 02348 /* Prepare transfer parameters */ 02349 hi2c->pBuffPtr = pData; 02350 hi2c->XferCount = Size; 02351 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02352 hi2c->XferSize = hi2c->XferCount; 02353 02354 /* Set the I2C DMA transfer complete callback */ 02355 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt; 02356 02357 /* Set the DMA error callback */ 02358 hi2c->hdmarx->XferErrorCallback = I2C_DMAError; 02359 02360 /* Set the unused DMA callbacks to NULL */ 02361 hi2c->hdmarx->XferHalfCpltCallback = NULL; 02362 hi2c->hdmarx->XferM1CpltCallback = NULL; 02363 hi2c->hdmarx->XferM1HalfCpltCallback = NULL; 02364 hi2c->hdmarx->XferAbortCallback = NULL; 02365 02366 /* Enable the DMA Stream */ 02367 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); 02368 02369 /* Enable Address Acknowledge */ 02370 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02371 02372 /* Process Unlocked */ 02373 __HAL_UNLOCK(hi2c); 02374 02375 /* Note : The I2C interrupts must be enabled after unlocking current process 02376 to avoid the risk of I2C interrupt handle execution before current 02377 process unlock */ 02378 /* Enable EVT and ERR interrupt */ 02379 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 02380 02381 /* Enable DMA Request */ 02382 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 02383 02384 return HAL_OK; 02385 } 02386 else 02387 { 02388 return HAL_BUSY; 02389 } 02390 } 02391 /** 02392 * @brief Write an amount of data in blocking mode to a specific memory address 02393 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02394 * the configuration information for the specified I2C. 02395 * @param DevAddress Target device address 02396 * @param MemAddress Internal memory address 02397 * @param MemAddSize Size of internal memory address 02398 * @param pData Pointer to data buffer 02399 * @param Size Amount of data to be sent 02400 * @param Timeout Timeout duration 02401 * @retval HAL status 02402 */ 02403 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) 02404 { 02405 uint32_t tickstart = 0x00U; 02406 02407 /* Init tickstart for timeout management*/ 02408 tickstart = HAL_GetTick(); 02409 02410 /* Check the parameters */ 02411 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 02412 02413 if(hi2c->State == HAL_I2C_STATE_READY) 02414 { 02415 /* Wait until BUSY flag is reset */ 02416 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 02417 { 02418 return HAL_BUSY; 02419 } 02420 02421 /* Process Locked */ 02422 __HAL_LOCK(hi2c); 02423 02424 /* Check if the I2C is already enabled */ 02425 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02426 { 02427 /* Enable I2C peripheral */ 02428 __HAL_I2C_ENABLE(hi2c); 02429 } 02430 02431 /* Disable Pos */ 02432 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02433 02434 hi2c->State = HAL_I2C_STATE_BUSY_TX; 02435 hi2c->Mode = HAL_I2C_MODE_MEM; 02436 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02437 02438 /* Prepare transfer parameters */ 02439 hi2c->pBuffPtr = pData; 02440 hi2c->XferCount = Size; 02441 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02442 hi2c->XferSize = hi2c->XferCount; 02443 02444 /* Send Slave Address and Memory Address */ 02445 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 02446 { 02447 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 02448 { 02449 /* Process Unlocked */ 02450 __HAL_UNLOCK(hi2c); 02451 return HAL_ERROR; 02452 } 02453 else 02454 { 02455 /* Process Unlocked */ 02456 __HAL_UNLOCK(hi2c); 02457 return HAL_TIMEOUT; 02458 } 02459 } 02460 02461 while(hi2c->XferSize > 0U) 02462 { 02463 /* Wait until TXE flag is set */ 02464 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 02465 { 02466 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 02467 { 02468 /* Generate Stop */ 02469 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02470 return HAL_ERROR; 02471 } 02472 else 02473 { 02474 return HAL_TIMEOUT; 02475 } 02476 } 02477 02478 /* Write data to DR */ 02479 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 02480 hi2c->XferSize--; 02481 hi2c->XferCount--; 02482 02483 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 02484 { 02485 /* Write data to DR */ 02486 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 02487 hi2c->XferSize--; 02488 hi2c->XferCount--; 02489 } 02490 } 02491 02492 /* Wait until BTF flag is set */ 02493 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 02494 { 02495 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 02496 { 02497 /* Generate Stop */ 02498 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02499 return HAL_ERROR; 02500 } 02501 else 02502 { 02503 return HAL_TIMEOUT; 02504 } 02505 } 02506 02507 /* Generate Stop */ 02508 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02509 02510 hi2c->State = HAL_I2C_STATE_READY; 02511 hi2c->Mode = HAL_I2C_MODE_NONE; 02512 02513 /* Process Unlocked */ 02514 __HAL_UNLOCK(hi2c); 02515 02516 return HAL_OK; 02517 } 02518 else 02519 { 02520 return HAL_BUSY; 02521 } 02522 } 02523 02524 /** 02525 * @brief Read an amount of data in blocking mode from a specific memory address 02526 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02527 * the configuration information for the specified I2C. 02528 * @param DevAddress Target device address 02529 * @param MemAddress Internal memory address 02530 * @param MemAddSize Size of internal memory address 02531 * @param pData Pointer to data buffer 02532 * @param Size Amount of data to be sent 02533 * @param Timeout Timeout duration 02534 * @retval HAL status 02535 */ 02536 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) 02537 { 02538 uint32_t tickstart = 0x00U; 02539 02540 /* Init tickstart for timeout management*/ 02541 tickstart = HAL_GetTick(); 02542 02543 /* Check the parameters */ 02544 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 02545 02546 if(hi2c->State == HAL_I2C_STATE_READY) 02547 { 02548 /* Wait until BUSY flag is reset */ 02549 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 02550 { 02551 return HAL_BUSY; 02552 } 02553 02554 /* Process Locked */ 02555 __HAL_LOCK(hi2c); 02556 02557 /* Check if the I2C is already enabled */ 02558 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02559 { 02560 /* Enable I2C peripheral */ 02561 __HAL_I2C_ENABLE(hi2c); 02562 } 02563 02564 /* Disable Pos */ 02565 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02566 02567 hi2c->State = HAL_I2C_STATE_BUSY_RX; 02568 hi2c->Mode = HAL_I2C_MODE_MEM; 02569 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02570 02571 /* Prepare transfer parameters */ 02572 hi2c->pBuffPtr = pData; 02573 hi2c->XferCount = Size; 02574 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02575 hi2c->XferSize = hi2c->XferCount; 02576 02577 /* Send Slave Address and Memory Address */ 02578 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 02579 { 02580 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 02581 { 02582 /* Process Unlocked */ 02583 __HAL_UNLOCK(hi2c); 02584 return HAL_ERROR; 02585 } 02586 else 02587 { 02588 /* Process Unlocked */ 02589 __HAL_UNLOCK(hi2c); 02590 return HAL_TIMEOUT; 02591 } 02592 } 02593 02594 if(hi2c->XferSize == 0U) 02595 { 02596 /* Clear ADDR flag */ 02597 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 02598 02599 /* Generate Stop */ 02600 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02601 } 02602 else if(hi2c->XferSize == 1U) 02603 { 02604 /* Disable Acknowledge */ 02605 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 02606 02607 /* Clear ADDR flag */ 02608 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 02609 02610 /* Generate Stop */ 02611 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02612 } 02613 else if(hi2c->XferSize == 2U) 02614 { 02615 /* Disable Acknowledge */ 02616 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 02617 02618 /* Enable Pos */ 02619 hi2c->Instance->CR1 |= I2C_CR1_POS; 02620 02621 /* Clear ADDR flag */ 02622 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 02623 } 02624 else 02625 { 02626 /* Clear ADDR flag */ 02627 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 02628 } 02629 02630 while(hi2c->XferSize > 0U) 02631 { 02632 if(hi2c->XferSize <= 3U) 02633 { 02634 /* One byte */ 02635 if(hi2c->XferSize== 1U) 02636 { 02637 /* Wait until RXNE flag is set */ 02638 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 02639 { 02640 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 02641 { 02642 return HAL_TIMEOUT; 02643 } 02644 else 02645 { 02646 return HAL_ERROR; 02647 } 02648 } 02649 02650 /* Read data from DR */ 02651 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02652 hi2c->XferSize--; 02653 hi2c->XferCount--; 02654 } 02655 /* Two bytes */ 02656 else if(hi2c->XferSize == 2U) 02657 { 02658 /* Wait until BTF flag is set */ 02659 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 02660 { 02661 return HAL_TIMEOUT; 02662 } 02663 02664 /* Generate Stop */ 02665 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02666 02667 /* Read data from DR */ 02668 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02669 hi2c->XferSize--; 02670 hi2c->XferCount--; 02671 02672 /* Read data from DR */ 02673 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02674 hi2c->XferSize--; 02675 hi2c->XferCount--; 02676 } 02677 /* 3 Last bytes */ 02678 else 02679 { 02680 /* Wait until BTF flag is set */ 02681 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 02682 { 02683 return HAL_TIMEOUT; 02684 } 02685 02686 /* Disable Acknowledge */ 02687 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 02688 02689 /* Read data from DR */ 02690 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02691 hi2c->XferSize--; 02692 hi2c->XferCount--; 02693 02694 /* Wait until BTF flag is set */ 02695 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 02696 { 02697 return HAL_TIMEOUT; 02698 } 02699 02700 /* Generate Stop */ 02701 hi2c->Instance->CR1 |= I2C_CR1_STOP; 02702 02703 /* Read data from DR */ 02704 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02705 hi2c->XferSize--; 02706 hi2c->XferCount--; 02707 02708 /* Read data from DR */ 02709 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02710 hi2c->XferSize--; 02711 hi2c->XferCount--; 02712 } 02713 } 02714 else 02715 { 02716 /* Wait until RXNE flag is set */ 02717 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 02718 { 02719 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 02720 { 02721 return HAL_TIMEOUT; 02722 } 02723 else 02724 { 02725 return HAL_ERROR; 02726 } 02727 } 02728 02729 /* Read data from DR */ 02730 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02731 hi2c->XferSize--; 02732 hi2c->XferCount--; 02733 02734 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 02735 { 02736 /* Read data from DR */ 02737 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 02738 hi2c->XferSize--; 02739 hi2c->XferCount--; 02740 } 02741 } 02742 } 02743 02744 hi2c->State = HAL_I2C_STATE_READY; 02745 hi2c->Mode = HAL_I2C_MODE_NONE; 02746 02747 /* Process Unlocked */ 02748 __HAL_UNLOCK(hi2c); 02749 02750 return HAL_OK; 02751 } 02752 else 02753 { 02754 return HAL_BUSY; 02755 } 02756 } 02757 02758 /** 02759 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address 02760 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02761 * the configuration information for the specified I2C. 02762 * @param DevAddress Target device address 02763 * @param MemAddress Internal memory address 02764 * @param MemAddSize Size of internal memory address 02765 * @param pData Pointer to data buffer 02766 * @param Size Amount of data to be sent 02767 * @retval HAL status 02768 */ 02769 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) 02770 { 02771 __IO uint32_t count = 0U; 02772 02773 /* Check the parameters */ 02774 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 02775 02776 if(hi2c->State == HAL_I2C_STATE_READY) 02777 { 02778 /* Wait until BUSY flag is reset */ 02779 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02780 do 02781 { 02782 if(count-- == 0U) 02783 { 02784 hi2c->PreviousState = I2C_STATE_NONE; 02785 hi2c->State= HAL_I2C_STATE_READY; 02786 02787 /* Process Unlocked */ 02788 __HAL_UNLOCK(hi2c); 02789 02790 return HAL_TIMEOUT; 02791 } 02792 } 02793 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02794 02795 /* Process Locked */ 02796 __HAL_LOCK(hi2c); 02797 02798 /* Check if the I2C is already enabled */ 02799 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02800 { 02801 /* Enable I2C peripheral */ 02802 __HAL_I2C_ENABLE(hi2c); 02803 } 02804 02805 /* Disable Pos */ 02806 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02807 02808 hi2c->State = HAL_I2C_STATE_BUSY_TX; 02809 hi2c->Mode = HAL_I2C_MODE_MEM; 02810 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02811 02812 /* Prepare transfer parameters */ 02813 hi2c->pBuffPtr = pData; 02814 hi2c->XferSize = Size; 02815 hi2c->XferCount = Size; 02816 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02817 hi2c->Devaddress = DevAddress; 02818 hi2c->Memaddress = MemAddress; 02819 hi2c->MemaddSize = MemAddSize; 02820 hi2c->EventCount = 0U; 02821 02822 /* Generate Start */ 02823 hi2c->Instance->CR1 |= I2C_CR1_START; 02824 02825 /* Process Unlocked */ 02826 __HAL_UNLOCK(hi2c); 02827 02828 /* Note : The I2C interrupts must be enabled after unlocking current process 02829 to avoid the risk of I2C interrupt handle execution before current 02830 process unlock */ 02831 02832 /* Enable EVT, BUF and ERR interrupt */ 02833 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 02834 02835 return HAL_OK; 02836 } 02837 else 02838 { 02839 return HAL_BUSY; 02840 } 02841 } 02842 02843 /** 02844 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address 02845 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02846 * the configuration information for the specified I2C. 02847 * @param DevAddress Target device address 02848 * @param MemAddress Internal memory address 02849 * @param MemAddSize Size of internal memory address 02850 * @param pData Pointer to data buffer 02851 * @param Size Amount of data to be sent 02852 * @retval HAL status 02853 */ 02854 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) 02855 { 02856 __IO uint32_t count = 0U; 02857 02858 /* Check the parameters */ 02859 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 02860 02861 if(hi2c->State == HAL_I2C_STATE_READY) 02862 { 02863 /* Wait until BUSY flag is reset */ 02864 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02865 do 02866 { 02867 if(count-- == 0U) 02868 { 02869 hi2c->PreviousState = I2C_STATE_NONE; 02870 hi2c->State= HAL_I2C_STATE_READY; 02871 02872 /* Process Unlocked */ 02873 __HAL_UNLOCK(hi2c); 02874 02875 return HAL_TIMEOUT; 02876 } 02877 } 02878 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02879 02880 /* Process Locked */ 02881 __HAL_LOCK(hi2c); 02882 02883 /* Check if the I2C is already enabled */ 02884 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02885 { 02886 /* Enable I2C peripheral */ 02887 __HAL_I2C_ENABLE(hi2c); 02888 } 02889 02890 /* Disable Pos */ 02891 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02892 02893 hi2c->State = HAL_I2C_STATE_BUSY_RX; 02894 hi2c->Mode = HAL_I2C_MODE_MEM; 02895 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02896 02897 /* Prepare transfer parameters */ 02898 hi2c->pBuffPtr = pData; 02899 hi2c->XferSize = Size; 02900 hi2c->XferCount = Size; 02901 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02902 hi2c->Devaddress = DevAddress; 02903 hi2c->Memaddress = MemAddress; 02904 hi2c->MemaddSize = MemAddSize; 02905 hi2c->EventCount = 0U; 02906 02907 /* Enable Acknowledge */ 02908 hi2c->Instance->CR1 |= I2C_CR1_ACK; 02909 02910 /* Generate Start */ 02911 hi2c->Instance->CR1 |= I2C_CR1_START; 02912 02913 /* Process Unlocked */ 02914 __HAL_UNLOCK(hi2c); 02915 02916 if(hi2c->XferSize > 0U) 02917 { 02918 /* Note : The I2C interrupts must be enabled after unlocking current process 02919 to avoid the risk of I2C interrupt handle execution before current 02920 process unlock */ 02921 02922 /* Enable EVT, BUF and ERR interrupt */ 02923 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 02924 } 02925 return HAL_OK; 02926 } 02927 else 02928 { 02929 return HAL_BUSY; 02930 } 02931 } 02932 02933 /** 02934 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address 02935 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 02936 * the configuration information for the specified I2C. 02937 * @param DevAddress Target device address 02938 * @param MemAddress Internal memory address 02939 * @param MemAddSize Size of internal memory address 02940 * @param pData Pointer to data buffer 02941 * @param Size Amount of data to be sent 02942 * @retval HAL status 02943 */ 02944 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) 02945 { 02946 __IO uint32_t count = 0U; 02947 02948 uint32_t tickstart = 0x00U; 02949 02950 /* Init tickstart for timeout management*/ 02951 tickstart = HAL_GetTick(); 02952 02953 /* Check the parameters */ 02954 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 02955 02956 if(hi2c->State == HAL_I2C_STATE_READY) 02957 { 02958 /* Wait until BUSY flag is reset */ 02959 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 02960 do 02961 { 02962 if(count-- == 0U) 02963 { 02964 hi2c->PreviousState = I2C_STATE_NONE; 02965 hi2c->State= HAL_I2C_STATE_READY; 02966 02967 /* Process Unlocked */ 02968 __HAL_UNLOCK(hi2c); 02969 02970 return HAL_TIMEOUT; 02971 } 02972 } 02973 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 02974 02975 /* Process Locked */ 02976 __HAL_LOCK(hi2c); 02977 02978 /* Check if the I2C is already enabled */ 02979 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 02980 { 02981 /* Enable I2C peripheral */ 02982 __HAL_I2C_ENABLE(hi2c); 02983 } 02984 02985 /* Disable Pos */ 02986 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 02987 02988 hi2c->State = HAL_I2C_STATE_BUSY_TX; 02989 hi2c->Mode = HAL_I2C_MODE_MEM; 02990 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 02991 02992 /* Prepare transfer parameters */ 02993 hi2c->pBuffPtr = pData; 02994 hi2c->XferSize = Size; 02995 hi2c->XferCount = Size; 02996 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 02997 02998 if(hi2c->XferSize > 0U) 02999 { 03000 /* Set the I2C DMA transfer complete callback */ 03001 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt; 03002 03003 /* Set the DMA error callback */ 03004 hi2c->hdmatx->XferErrorCallback = I2C_DMAError; 03005 03006 /* Set the unused DMA callbacks to NULL */ 03007 hi2c->hdmatx->XferHalfCpltCallback = NULL; 03008 hi2c->hdmatx->XferM1CpltCallback = NULL; 03009 hi2c->hdmatx->XferM1HalfCpltCallback = NULL; 03010 hi2c->hdmatx->XferAbortCallback = NULL; 03011 03012 /* Enable the DMA Stream */ 03013 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize); 03014 03015 /* Send Slave Address and Memory Address */ 03016 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) 03017 { 03018 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 03019 { 03020 /* Process Unlocked */ 03021 __HAL_UNLOCK(hi2c); 03022 return HAL_ERROR; 03023 } 03024 else 03025 { 03026 /* Process Unlocked */ 03027 __HAL_UNLOCK(hi2c); 03028 return HAL_TIMEOUT; 03029 } 03030 } 03031 03032 /* Clear ADDR flag */ 03033 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 03034 03035 /* Process Unlocked */ 03036 __HAL_UNLOCK(hi2c); 03037 03038 /* Note : The I2C interrupts must be enabled after unlocking current process 03039 to avoid the risk of I2C interrupt handle execution before current 03040 process unlock */ 03041 /* Enable ERR interrupt */ 03042 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR); 03043 03044 /* Enable DMA Request */ 03045 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 03046 } 03047 return HAL_OK; 03048 } 03049 else 03050 { 03051 return HAL_BUSY; 03052 } 03053 } 03054 03055 /** 03056 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. 03057 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03058 * the configuration information for the specified I2C. 03059 * @param DevAddress Target device address 03060 * @param MemAddress Internal memory address 03061 * @param MemAddSize Size of internal memory address 03062 * @param pData Pointer to data buffer 03063 * @param Size Amount of data to be read 03064 * @retval HAL status 03065 */ 03066 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) 03067 { 03068 uint32_t tickstart = 0x00U; 03069 __IO uint32_t count = 0U; 03070 03071 /* Init tickstart for timeout management*/ 03072 tickstart = HAL_GetTick(); 03073 03074 /* Check the parameters */ 03075 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); 03076 03077 if(hi2c->State == HAL_I2C_STATE_READY) 03078 { 03079 /* Wait until BUSY flag is reset */ 03080 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U); 03081 do 03082 { 03083 if(count-- == 0U) 03084 { 03085 hi2c->PreviousState = I2C_STATE_NONE; 03086 hi2c->State= HAL_I2C_STATE_READY; 03087 03088 /* Process Unlocked */ 03089 __HAL_UNLOCK(hi2c); 03090 03091 return HAL_TIMEOUT; 03092 } 03093 } 03094 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET); 03095 03096 /* Process Locked */ 03097 __HAL_LOCK(hi2c); 03098 03099 /* Check if the I2C is already enabled */ 03100 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 03101 { 03102 /* Enable I2C peripheral */ 03103 __HAL_I2C_ENABLE(hi2c); 03104 } 03105 03106 /* Disable Pos */ 03107 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 03108 03109 hi2c->State = HAL_I2C_STATE_BUSY_RX; 03110 hi2c->Mode = HAL_I2C_MODE_MEM; 03111 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 03112 03113 /* Prepare transfer parameters */ 03114 hi2c->pBuffPtr = pData; 03115 hi2c->XferCount = Size; 03116 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 03117 hi2c->XferSize = hi2c->XferCount; 03118 03119 if(hi2c->XferSize > 0U) 03120 { 03121 /* Set the I2C DMA transfer complete callback */ 03122 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt; 03123 03124 /* Set the DMA error callback */ 03125 hi2c->hdmarx->XferErrorCallback = I2C_DMAError; 03126 03127 /* Set the unused DMA callbacks to NULL */ 03128 hi2c->hdmarx->XferHalfCpltCallback = NULL; 03129 hi2c->hdmarx->XferM1CpltCallback = NULL; 03130 hi2c->hdmarx->XferM1HalfCpltCallback = NULL; 03131 hi2c->hdmarx->XferAbortCallback = NULL; 03132 03133 /* Enable the DMA Stream */ 03134 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); 03135 03136 /* Send Slave Address and Memory Address */ 03137 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) 03138 { 03139 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 03140 { 03141 /* Process Unlocked */ 03142 __HAL_UNLOCK(hi2c); 03143 return HAL_ERROR; 03144 } 03145 else 03146 { 03147 /* Process Unlocked */ 03148 __HAL_UNLOCK(hi2c); 03149 return HAL_TIMEOUT; 03150 } 03151 } 03152 03153 if(Size == 1U) 03154 { 03155 /* Disable Acknowledge */ 03156 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 03157 } 03158 else 03159 { 03160 /* Enable Last DMA bit */ 03161 hi2c->Instance->CR2 |= I2C_CR2_LAST; 03162 } 03163 03164 /* Clear ADDR flag */ 03165 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 03166 03167 /* Process Unlocked */ 03168 __HAL_UNLOCK(hi2c); 03169 03170 /* Note : The I2C interrupts must be enabled after unlocking current process 03171 to avoid the risk of I2C interrupt handle execution before current 03172 process unlock */ 03173 /* Enable ERR interrupt */ 03174 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR); 03175 03176 /* Enable DMA Request */ 03177 hi2c->Instance->CR2 |= I2C_CR2_DMAEN; 03178 } 03179 else 03180 { 03181 /* Send Slave Address and Memory Address */ 03182 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) 03183 { 03184 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 03185 { 03186 /* Process Unlocked */ 03187 __HAL_UNLOCK(hi2c); 03188 return HAL_ERROR; 03189 } 03190 else 03191 { 03192 /* Process Unlocked */ 03193 __HAL_UNLOCK(hi2c); 03194 return HAL_TIMEOUT; 03195 } 03196 } 03197 03198 /* Clear ADDR flag */ 03199 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 03200 03201 /* Generate Stop */ 03202 hi2c->Instance->CR1 |= I2C_CR1_STOP; 03203 03204 hi2c->State = HAL_I2C_STATE_READY; 03205 03206 /* Process Unlocked */ 03207 __HAL_UNLOCK(hi2c); 03208 } 03209 03210 return HAL_OK; 03211 } 03212 else 03213 { 03214 return HAL_BUSY; 03215 } 03216 } 03217 03218 /** 03219 * @brief Checks if target device is ready for communication. 03220 * @note This function is used with Memory devices 03221 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03222 * the configuration information for the specified I2C. 03223 * @param DevAddress Target device address 03224 * @param Trials Number of trials 03225 * @param Timeout Timeout duration 03226 * @retval HAL status 03227 */ 03228 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) 03229 { 03230 uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U; 03231 03232 /* Get tick */ 03233 tickstart = HAL_GetTick(); 03234 03235 if(hi2c->State == HAL_I2C_STATE_READY) 03236 { 03237 /* Wait until BUSY flag is reset */ 03238 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 03239 { 03240 return HAL_BUSY; 03241 } 03242 03243 /* Process Locked */ 03244 __HAL_LOCK(hi2c); 03245 03246 /* Check if the I2C is already enabled */ 03247 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 03248 { 03249 /* Enable I2C peripheral */ 03250 __HAL_I2C_ENABLE(hi2c); 03251 } 03252 03253 /* Disable Pos */ 03254 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 03255 03256 hi2c->State = HAL_I2C_STATE_BUSY; 03257 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 03258 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 03259 03260 do 03261 { 03262 /* Generate Start */ 03263 hi2c->Instance->CR1 |= I2C_CR1_START; 03264 03265 /* Wait until SB flag is set */ 03266 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK) 03267 { 03268 return HAL_TIMEOUT; 03269 } 03270 03271 /* Send slave address */ 03272 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 03273 03274 /* Wait until ADDR or AF flag are set */ 03275 /* Get tick */ 03276 tickstart = HAL_GetTick(); 03277 03278 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); 03279 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); 03280 tmp3 = hi2c->State; 03281 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT)) 03282 { 03283 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) 03284 { 03285 hi2c->State = HAL_I2C_STATE_TIMEOUT; 03286 } 03287 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); 03288 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); 03289 tmp3 = hi2c->State; 03290 } 03291 03292 hi2c->State = HAL_I2C_STATE_READY; 03293 03294 /* Check if the ADDR flag has been set */ 03295 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) 03296 { 03297 /* Generate Stop */ 03298 hi2c->Instance->CR1 |= I2C_CR1_STOP; 03299 03300 /* Clear ADDR Flag */ 03301 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 03302 03303 /* Wait until BUSY flag is reset */ 03304 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 03305 { 03306 return HAL_TIMEOUT; 03307 } 03308 03309 hi2c->State = HAL_I2C_STATE_READY; 03310 03311 /* Process Unlocked */ 03312 __HAL_UNLOCK(hi2c); 03313 03314 return HAL_OK; 03315 } 03316 else 03317 { 03318 /* Generate Stop */ 03319 hi2c->Instance->CR1 |= I2C_CR1_STOP; 03320 03321 /* Clear AF Flag */ 03322 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 03323 03324 /* Wait until BUSY flag is reset */ 03325 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 03326 { 03327 return HAL_TIMEOUT; 03328 } 03329 } 03330 }while(I2C_Trials++ < Trials); 03331 03332 hi2c->State = HAL_I2C_STATE_READY; 03333 03334 /* Process Unlocked */ 03335 __HAL_UNLOCK(hi2c); 03336 03337 return HAL_ERROR; 03338 } 03339 else 03340 { 03341 return HAL_BUSY; 03342 } 03343 } 03344 03345 /** 03346 * @brief This function handles I2C event interrupt request. 03347 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03348 * the configuration information for the specified I2C. 03349 * @retval None 03350 */ 03351 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) 03352 { 03353 uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2); 03354 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1); 03355 uint32_t itsources = READ_REG(hi2c->Instance->CR2); 03356 03357 uint32_t CurrentMode = hi2c->Mode; 03358 03359 /* Master or Memory mode selected */ 03360 if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) 03361 { 03362 /* SB Set ----------------------------------------------------------------*/ 03363 if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03364 { 03365 I2C_Master_SB(hi2c); 03366 } 03367 /* ADD10 Set -------------------------------------------------------------*/ 03368 else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03369 { 03370 I2C_Master_ADD10(hi2c); 03371 } 03372 /* ADDR Set --------------------------------------------------------------*/ 03373 else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03374 { 03375 I2C_Master_ADDR(hi2c); 03376 } 03377 03378 /* I2C in mode Transmitter -----------------------------------------------*/ 03379 if((sr2itflags & I2C_FLAG_TRA) != RESET) 03380 { 03381 /* TXE set and BTF reset -----------------------------------------------*/ 03382 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 03383 { 03384 I2C_MasterTransmit_TXE(hi2c); 03385 } 03386 /* BTF set -------------------------------------------------------------*/ 03387 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03388 { 03389 I2C_MasterTransmit_BTF(hi2c); 03390 } 03391 } 03392 /* I2C in mode Receiver --------------------------------------------------*/ 03393 else 03394 { 03395 /* RXNE set and BTF reset -----------------------------------------------*/ 03396 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 03397 { 03398 I2C_MasterReceive_RXNE(hi2c); 03399 } 03400 /* BTF set -------------------------------------------------------------*/ 03401 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03402 { 03403 I2C_MasterReceive_BTF(hi2c); 03404 } 03405 } 03406 } 03407 /* Slave mode selected */ 03408 else 03409 { 03410 /* ADDR set --------------------------------------------------------------*/ 03411 if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03412 { 03413 I2C_Slave_ADDR(hi2c); 03414 } 03415 /* STOPF set --------------------------------------------------------------*/ 03416 else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03417 { 03418 I2C_Slave_STOPF(hi2c); 03419 } 03420 /* I2C in mode Transmitter -----------------------------------------------*/ 03421 else if((sr2itflags & I2C_FLAG_TRA) != RESET) 03422 { 03423 /* TXE set and BTF reset -----------------------------------------------*/ 03424 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 03425 { 03426 I2C_SlaveTransmit_TXE(hi2c); 03427 } 03428 /* BTF set -------------------------------------------------------------*/ 03429 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03430 { 03431 I2C_SlaveTransmit_BTF(hi2c); 03432 } 03433 } 03434 /* I2C in mode Receiver --------------------------------------------------*/ 03435 else 03436 { 03437 /* RXNE set and BTF reset ----------------------------------------------*/ 03438 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 03439 { 03440 I2C_SlaveReceive_RXNE(hi2c); 03441 } 03442 /* BTF set -------------------------------------------------------------*/ 03443 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 03444 { 03445 I2C_SlaveReceive_BTF(hi2c); 03446 } 03447 } 03448 } 03449 } 03450 03451 /** 03452 * @brief This function handles I2C error interrupt request. 03453 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03454 * the configuration information for the specified I2C. 03455 * @retval None 03456 */ 03457 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) 03458 { 03459 uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U; 03460 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1); 03461 uint32_t itsources = READ_REG(hi2c->Instance->CR2); 03462 03463 /* I2C Bus error interrupt occurred ----------------------------------------*/ 03464 if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET)) 03465 { 03466 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; 03467 03468 /* Clear BERR flag */ 03469 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); 03470 } 03471 03472 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/ 03473 if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET)) 03474 { 03475 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; 03476 03477 /* Clear ARLO flag */ 03478 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); 03479 } 03480 03481 /* I2C Acknowledge failure error interrupt occurred ------------------------*/ 03482 if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET)) 03483 { 03484 tmp1 = hi2c->Mode; 03485 tmp2 = hi2c->XferCount; 03486 tmp3 = hi2c->State; 03487 tmp4 = hi2c->PreviousState; 03488 if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \ 03489 ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \ 03490 ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX)))) 03491 { 03492 I2C_Slave_AF(hi2c); 03493 } 03494 else 03495 { 03496 hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 03497 03498 /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */ 03499 if(hi2c->Mode == HAL_I2C_MODE_MASTER) 03500 { 03501 /* Generate Stop */ 03502 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); 03503 } 03504 03505 /* Clear AF flag */ 03506 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 03507 } 03508 } 03509 03510 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/ 03511 if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET)) 03512 { 03513 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; 03514 /* Clear OVR flag */ 03515 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); 03516 } 03517 03518 /* Call the Error Callback in case of Error detected -----------------------*/ 03519 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 03520 { 03521 I2C_ITError(hi2c); 03522 } 03523 } 03524 03525 /** 03526 * @brief Master Tx Transfer completed callback. 03527 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03528 * the configuration information for the specified I2C. 03529 * @retval None 03530 */ 03531 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) 03532 { 03533 /* Prevent unused argument(s) compilation warning */ 03534 UNUSED(hi2c); 03535 03536 /* NOTE : This function should not be modified, when the callback is needed, 03537 the HAL_I2C_MasterTxCpltCallback can be implemented in the user file 03538 */ 03539 } 03540 03541 /** 03542 * @brief Master Rx Transfer completed callback. 03543 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03544 * the configuration information for the specified I2C. 03545 * @retval None 03546 */ 03547 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) 03548 { 03549 /* Prevent unused argument(s) compilation warning */ 03550 UNUSED(hi2c); 03551 03552 /* NOTE : This function should not be modified, when the callback is needed, 03553 the HAL_I2C_MasterRxCpltCallback can be implemented in the user file 03554 */ 03555 } 03556 03557 /** @brief Slave Tx Transfer completed callback. 03558 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03559 * the configuration information for the specified I2C. 03560 * @retval None 03561 */ 03562 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) 03563 { 03564 /* Prevent unused argument(s) compilation warning */ 03565 UNUSED(hi2c); 03566 03567 /* NOTE : This function should not be modified, when the callback is needed, 03568 the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file 03569 */ 03570 } 03571 03572 /** 03573 * @brief Slave Rx Transfer completed callback. 03574 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03575 * the configuration information for the specified I2C. 03576 * @retval None 03577 */ 03578 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) 03579 { 03580 /* Prevent unused argument(s) compilation warning */ 03581 UNUSED(hi2c); 03582 03583 /* NOTE : This function should not be modified, when the callback is needed, 03584 the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file 03585 */ 03586 } 03587 03588 /** 03589 * @brief Slave Address Match callback. 03590 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03591 * the configuration information for the specified I2C. 03592 * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition 03593 * @param AddrMatchCode Address Match Code 03594 * @retval None 03595 */ 03596 __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) 03597 { 03598 /* Prevent unused argument(s) compilation warning */ 03599 UNUSED(hi2c); 03600 UNUSED(TransferDirection); 03601 UNUSED(AddrMatchCode); 03602 03603 /* NOTE : This function should not be modified, when the callback is needed, 03604 the HAL_I2C_AddrCallback can be implemented in the user file 03605 */ 03606 } 03607 03608 /** 03609 * @brief Listen Complete callback. 03610 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03611 * the configuration information for the specified I2C. 03612 * @retval None 03613 */ 03614 __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) 03615 { 03616 /* Prevent unused argument(s) compilation warning */ 03617 UNUSED(hi2c); 03618 03619 /* NOTE : This function should not be modified, when the callback is needed, 03620 the HAL_I2C_ListenCpltCallback can be implemented in the user file 03621 */ 03622 } 03623 03624 /** 03625 * @brief Memory Tx Transfer completed callback. 03626 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03627 * the configuration information for the specified I2C. 03628 * @retval None 03629 */ 03630 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) 03631 { 03632 /* Prevent unused argument(s) compilation warning */ 03633 UNUSED(hi2c); 03634 03635 /* NOTE : This function should not be modified, when the callback is needed, 03636 the HAL_I2C_MemTxCpltCallback can be implemented in the user file 03637 */ 03638 } 03639 03640 /** 03641 * @brief Memory Rx Transfer completed callback. 03642 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03643 * the configuration information for the specified I2C. 03644 * @retval None 03645 */ 03646 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) 03647 { 03648 /* Prevent unused argument(s) compilation warning */ 03649 UNUSED(hi2c); 03650 03651 /* NOTE : This function should not be modified, when the callback is needed, 03652 the HAL_I2C_MemRxCpltCallback can be implemented in the user file 03653 */ 03654 } 03655 03656 /** 03657 * @brief I2C error callback. 03658 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03659 * the configuration information for the specified I2C. 03660 * @retval None 03661 */ 03662 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) 03663 { 03664 /* Prevent unused argument(s) compilation warning */ 03665 UNUSED(hi2c); 03666 03667 /* NOTE : This function should not be modified, when the callback is needed, 03668 the HAL_I2C_ErrorCallback can be implemented in the user file 03669 */ 03670 } 03671 03672 /** 03673 * @brief I2C abort callback. 03674 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03675 * the configuration information for the specified I2C. 03676 * @retval None 03677 */ 03678 __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) 03679 { 03680 /* Prevent unused argument(s) compilation warning */ 03681 UNUSED(hi2c); 03682 03683 /* NOTE : This function should not be modified, when the callback is needed, 03684 the HAL_I2C_AbortCpltCallback could be implemented in the user file 03685 */ 03686 } 03687 03688 /** 03689 * @} 03690 */ 03691 03692 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 03693 * @brief Peripheral State and Errors functions 03694 * 03695 @verbatim 03696 =============================================================================== 03697 ##### Peripheral State, Mode and Error functions ##### 03698 =============================================================================== 03699 [..] 03700 This subsection permits to get in run-time the status of the peripheral 03701 and the data flow. 03702 03703 @endverbatim 03704 * @{ 03705 */ 03706 03707 /** 03708 * @brief Return the I2C handle state. 03709 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03710 * the configuration information for the specified I2C. 03711 * @retval HAL state 03712 */ 03713 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) 03714 { 03715 /* Return I2C handle state */ 03716 return hi2c->State; 03717 } 03718 03719 /** 03720 * @brief Return the I2C Master, Slave, Memory or no mode. 03721 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03722 * the configuration information for I2C module 03723 * @retval HAL mode 03724 */ 03725 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c) 03726 { 03727 return hi2c->Mode; 03728 } 03729 03730 /** 03731 * @brief Return the I2C error code 03732 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03733 * the configuration information for the specified I2C. 03734 * @retval I2C Error Code 03735 */ 03736 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) 03737 { 03738 return hi2c->ErrorCode; 03739 } 03740 03741 /** 03742 * @} 03743 */ 03744 03745 /** 03746 * @brief Handle TXE flag for Master 03747 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03748 * the configuration information for I2C module 03749 * @retval HAL status 03750 */ 03751 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) 03752 { 03753 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 03754 uint32_t CurrentState = hi2c->State; 03755 uint32_t CurrentMode = hi2c->Mode; 03756 uint32_t CurrentXferOptions = hi2c->XferOptions; 03757 03758 if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 03759 { 03760 /* Call TxCpltCallback() directly if no stop mode is set */ 03761 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 03762 { 03763 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 03764 03765 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 03766 hi2c->Mode = HAL_I2C_MODE_NONE; 03767 hi2c->State = HAL_I2C_STATE_READY; 03768 03769 HAL_I2C_MasterTxCpltCallback(hi2c); 03770 } 03771 else /* Generate Stop condition then Call TxCpltCallback() */ 03772 { 03773 /* Disable EVT, BUF and ERR interrupt */ 03774 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 03775 03776 /* Generate Stop */ 03777 hi2c->Instance->CR1 |= I2C_CR1_STOP; 03778 03779 hi2c->PreviousState = I2C_STATE_NONE; 03780 hi2c->State = HAL_I2C_STATE_READY; 03781 03782 if(hi2c->Mode == HAL_I2C_MODE_MEM) 03783 { 03784 hi2c->Mode = HAL_I2C_MODE_NONE; 03785 HAL_I2C_MemTxCpltCallback(hi2c); 03786 } 03787 else 03788 { 03789 hi2c->Mode = HAL_I2C_MODE_NONE; 03790 HAL_I2C_MasterTxCpltCallback(hi2c); 03791 } 03792 } 03793 } 03794 else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \ 03795 ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX))) 03796 { 03797 if(hi2c->XferCount == 0U) 03798 { 03799 /* Disable BUF interrupt */ 03800 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 03801 } 03802 else 03803 { 03804 if(hi2c->Mode == HAL_I2C_MODE_MEM) 03805 { 03806 if(hi2c->EventCount == 0) 03807 { 03808 /* If Memory address size is 8Bit */ 03809 if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) 03810 { 03811 /* Send Memory Address */ 03812 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 03813 03814 hi2c->EventCount += 2; 03815 } 03816 /* If Memory address size is 16Bit */ 03817 else 03818 { 03819 /* Send MSB of Memory Address */ 03820 hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress); 03821 03822 hi2c->EventCount++; 03823 } 03824 } 03825 else if(hi2c->EventCount == 1) 03826 { 03827 /* Send LSB of Memory Address */ 03828 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 03829 03830 hi2c->EventCount++; 03831 } 03832 else if(hi2c->EventCount == 2) 03833 { 03834 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 03835 { 03836 /* Generate Restart */ 03837 hi2c->Instance->CR1 |= I2C_CR1_START; 03838 } 03839 else if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 03840 { 03841 /* Write data to DR */ 03842 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 03843 hi2c->XferCount--; 03844 } 03845 } 03846 } 03847 else 03848 { 03849 /* Write data to DR */ 03850 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 03851 hi2c->XferCount--; 03852 } 03853 } 03854 } 03855 return HAL_OK; 03856 } 03857 03858 /** 03859 * @brief Handle BTF flag for Master transmitter 03860 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03861 * the configuration information for I2C module 03862 * @retval HAL status 03863 */ 03864 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) 03865 { 03866 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 03867 uint32_t CurrentXferOptions = hi2c->XferOptions; 03868 03869 if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 03870 { 03871 if(hi2c->XferCount != 0U) 03872 { 03873 /* Write data to DR */ 03874 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 03875 hi2c->XferCount--; 03876 } 03877 else 03878 { 03879 /* Call TxCpltCallback() directly if no stop mode is set */ 03880 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 03881 { 03882 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 03883 03884 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 03885 hi2c->Mode = HAL_I2C_MODE_NONE; 03886 hi2c->State = HAL_I2C_STATE_READY; 03887 03888 HAL_I2C_MasterTxCpltCallback(hi2c); 03889 } 03890 else /* Generate Stop condition then Call TxCpltCallback() */ 03891 { 03892 /* Disable EVT, BUF and ERR interrupt */ 03893 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 03894 03895 /* Generate Stop */ 03896 hi2c->Instance->CR1 |= I2C_CR1_STOP; 03897 03898 hi2c->PreviousState = I2C_STATE_NONE; 03899 hi2c->State = HAL_I2C_STATE_READY; 03900 03901 if(hi2c->Mode == HAL_I2C_MODE_MEM) 03902 { 03903 hi2c->Mode = HAL_I2C_MODE_NONE; 03904 03905 HAL_I2C_MemTxCpltCallback(hi2c); 03906 } 03907 else 03908 { 03909 hi2c->Mode = HAL_I2C_MODE_NONE; 03910 03911 HAL_I2C_MasterTxCpltCallback(hi2c); 03912 } 03913 } 03914 } 03915 } 03916 return HAL_OK; 03917 } 03918 03919 /** 03920 * @brief Handle RXNE flag for Master 03921 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03922 * the configuration information for I2C module 03923 * @retval HAL status 03924 */ 03925 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) 03926 { 03927 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 03928 { 03929 uint32_t tmp = 0U; 03930 03931 tmp = hi2c->XferCount; 03932 if(tmp > 3U) 03933 { 03934 /* Read data from DR */ 03935 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 03936 hi2c->XferCount--; 03937 03938 if(hi2c->XferCount == 3) 03939 { 03940 /* Disable BUF interrupt, this help to treat correctly the last 4 bytes 03941 on BTF subroutine */ 03942 /* Disable BUF interrupt */ 03943 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 03944 } 03945 } 03946 else if((tmp == 1U) || (tmp == 0U)) 03947 { 03948 /* Disable Acknowledge */ 03949 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 03950 03951 /* Disable EVT, BUF and ERR interrupt */ 03952 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 03953 03954 /* Read data from DR */ 03955 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 03956 hi2c->XferCount--; 03957 03958 hi2c->State = HAL_I2C_STATE_READY; 03959 hi2c->PreviousState = I2C_STATE_NONE; 03960 03961 if(hi2c->Mode == HAL_I2C_MODE_MEM) 03962 { 03963 hi2c->Mode = HAL_I2C_MODE_NONE; 03964 HAL_I2C_MemRxCpltCallback(hi2c); 03965 } 03966 else 03967 { 03968 hi2c->Mode = HAL_I2C_MODE_NONE; 03969 HAL_I2C_MasterRxCpltCallback(hi2c); 03970 } 03971 } 03972 } 03973 return HAL_OK; 03974 } 03975 03976 /** 03977 * @brief Handle BTF flag for Master receiver 03978 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 03979 * the configuration information for I2C module 03980 * @retval HAL status 03981 */ 03982 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) 03983 { 03984 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 03985 uint32_t CurrentXferOptions = hi2c->XferOptions; 03986 03987 if(hi2c->XferCount == 4U) 03988 { 03989 /* Disable BUF interrupt, this help to treat correctly the last 2 bytes 03990 on BTF subroutine if there is a reception delay between N-1 and N byte */ 03991 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 03992 03993 /* Read data from DR */ 03994 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 03995 hi2c->XferCount--; 03996 } 03997 else if(hi2c->XferCount == 3U) 03998 { 03999 /* Disable BUF interrupt, this help to treat correctly the last 2 bytes 04000 on BTF subroutine if there is a reception delay between N-1 and N byte */ 04001 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 04002 04003 /* Disable Acknowledge */ 04004 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04005 04006 /* Read data from DR */ 04007 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04008 hi2c->XferCount--; 04009 } 04010 else if(hi2c->XferCount == 2U) 04011 { 04012 /* Prepare next transfer or stop current transfer */ 04013 if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME)) 04014 { 04015 /* Disable Acknowledge */ 04016 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04017 04018 /* Generate ReStart */ 04019 hi2c->Instance->CR1 |= I2C_CR1_START; 04020 } 04021 else 04022 { 04023 /* Generate Stop */ 04024 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04025 } 04026 04027 /* Read data from DR */ 04028 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04029 hi2c->XferCount--; 04030 04031 /* Read data from DR */ 04032 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04033 hi2c->XferCount--; 04034 04035 /* Disable EVT and ERR interrupt */ 04036 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 04037 04038 hi2c->State = HAL_I2C_STATE_READY; 04039 hi2c->PreviousState = I2C_STATE_NONE; 04040 04041 if(hi2c->Mode == HAL_I2C_MODE_MEM) 04042 { 04043 hi2c->Mode = HAL_I2C_MODE_NONE; 04044 04045 HAL_I2C_MemRxCpltCallback(hi2c); 04046 } 04047 else 04048 { 04049 hi2c->Mode = HAL_I2C_MODE_NONE; 04050 04051 HAL_I2C_MasterRxCpltCallback(hi2c); 04052 } 04053 } 04054 else 04055 { 04056 /* Read data from DR */ 04057 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04058 hi2c->XferCount--; 04059 } 04060 return HAL_OK; 04061 } 04062 04063 /** 04064 * @brief Handle SB flag for Master 04065 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04066 * the configuration information for I2C module 04067 * @retval HAL status 04068 */ 04069 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c) 04070 { 04071 if(hi2c->Mode == HAL_I2C_MODE_MEM) 04072 { 04073 if(hi2c->EventCount == 0U) 04074 { 04075 /* Send slave address */ 04076 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 04077 } 04078 else 04079 { 04080 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 04081 } 04082 } 04083 else 04084 { 04085 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 04086 { 04087 /* Send slave 7 Bits address */ 04088 if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 04089 { 04090 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 04091 } 04092 else 04093 { 04094 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 04095 } 04096 } 04097 else 04098 { 04099 if(hi2c->EventCount == 0U) 04100 { 04101 /* Send header of slave address */ 04102 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress); 04103 } 04104 else if(hi2c->EventCount == 1U) 04105 { 04106 /* Send header of slave address */ 04107 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress); 04108 } 04109 } 04110 } 04111 04112 return HAL_OK; 04113 } 04114 04115 /** 04116 * @brief Handle ADD10 flag for Master 04117 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04118 * the configuration information for I2C module 04119 * @retval HAL status 04120 */ 04121 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c) 04122 { 04123 /* Send slave address */ 04124 hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress); 04125 04126 return HAL_OK; 04127 } 04128 04129 /** 04130 * @brief Handle ADDR flag for Master 04131 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04132 * the configuration information for I2C module 04133 * @retval HAL status 04134 */ 04135 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c) 04136 { 04137 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 04138 uint32_t CurrentMode = hi2c->Mode; 04139 uint32_t CurrentXferOptions = hi2c->XferOptions; 04140 uint32_t Prev_State = hi2c->PreviousState; 04141 04142 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 04143 { 04144 if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM)) 04145 { 04146 /* Clear ADDR flag */ 04147 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04148 } 04149 else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)) 04150 { 04151 /* Clear ADDR flag */ 04152 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04153 04154 /* Generate Restart */ 04155 hi2c->Instance->CR1 |= I2C_CR1_START; 04156 04157 hi2c->EventCount++; 04158 } 04159 else 04160 { 04161 if(hi2c->XferCount == 0U) 04162 { 04163 /* Clear ADDR flag */ 04164 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04165 04166 /* Generate Stop */ 04167 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04168 } 04169 else if(hi2c->XferCount == 1U) 04170 { 04171 if(CurrentXferOptions == I2C_NO_OPTION_FRAME) 04172 { 04173 /* Disable Acknowledge */ 04174 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04175 04176 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 04177 { 04178 /* Disable Acknowledge */ 04179 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04180 04181 /* Clear ADDR flag */ 04182 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04183 } 04184 else 04185 { 04186 /* Clear ADDR flag */ 04187 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04188 04189 /* Generate Stop */ 04190 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04191 } 04192 } 04193 /* Prepare next transfer or stop current transfer */ 04194 else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \ 04195 && (Prev_State != I2C_STATE_MASTER_BUSY_RX)) 04196 { 04197 if(hi2c->XferOptions != I2C_NEXT_FRAME) 04198 { 04199 /* Disable Acknowledge */ 04200 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04201 } 04202 else 04203 { 04204 /* Enable Acknowledge */ 04205 hi2c->Instance->CR1 |= I2C_CR1_ACK; 04206 } 04207 04208 /* Clear ADDR flag */ 04209 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04210 } 04211 else 04212 { 04213 /* Disable Acknowledge */ 04214 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04215 04216 /* Clear ADDR flag */ 04217 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04218 04219 /* Generate Stop */ 04220 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04221 } 04222 } 04223 else if(hi2c->XferCount == 2U) 04224 { 04225 if(hi2c->XferOptions != I2C_NEXT_FRAME) 04226 { 04227 /* Disable Acknowledge */ 04228 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04229 04230 /* Enable Pos */ 04231 hi2c->Instance->CR1 |= I2C_CR1_POS; 04232 } 04233 else 04234 { 04235 /* Enable Acknowledge */ 04236 hi2c->Instance->CR1 |= I2C_CR1_ACK; 04237 } 04238 04239 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 04240 { 04241 /* Enable Last DMA bit */ 04242 hi2c->Instance->CR2 |= I2C_CR2_LAST; 04243 } 04244 04245 /* Clear ADDR flag */ 04246 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04247 } 04248 else 04249 { 04250 /* Enable Acknowledge */ 04251 hi2c->Instance->CR1 |= I2C_CR1_ACK; 04252 04253 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 04254 { 04255 /* Enable Last DMA bit */ 04256 hi2c->Instance->CR2 |= I2C_CR2_LAST; 04257 } 04258 04259 /* Clear ADDR flag */ 04260 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04261 } 04262 04263 /* Reset Event counter */ 04264 hi2c->EventCount = 0U; 04265 } 04266 } 04267 else 04268 { 04269 /* Clear ADDR flag */ 04270 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04271 } 04272 04273 return HAL_OK; 04274 } 04275 04276 /** 04277 * @brief Handle TXE flag for Slave 04278 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04279 * the configuration information for I2C module 04280 * @retval HAL status 04281 */ 04282 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) 04283 { 04284 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 04285 uint32_t CurrentState = hi2c->State; 04286 04287 if(hi2c->XferCount != 0U) 04288 { 04289 /* Write data to DR */ 04290 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 04291 hi2c->XferCount--; 04292 04293 if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) 04294 { 04295 /* Last Byte is received, disable Interrupt */ 04296 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 04297 04298 /* Set state at HAL_I2C_STATE_LISTEN */ 04299 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; 04300 hi2c->State = HAL_I2C_STATE_LISTEN; 04301 04302 /* Call the Tx complete callback to inform upper layer of the end of receive process */ 04303 HAL_I2C_SlaveTxCpltCallback(hi2c); 04304 } 04305 } 04306 return HAL_OK; 04307 } 04308 04309 /** 04310 * @brief Handle BTF flag for Slave transmitter 04311 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04312 * the configuration information for I2C module 04313 * @retval HAL status 04314 */ 04315 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) 04316 { 04317 if(hi2c->XferCount != 0U) 04318 { 04319 /* Write data to DR */ 04320 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 04321 hi2c->XferCount--; 04322 } 04323 return HAL_OK; 04324 } 04325 04326 /** 04327 * @brief Handle RXNE flag for Slave 04328 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04329 * the configuration information for I2C module 04330 * @retval HAL status 04331 */ 04332 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) 04333 { 04334 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 04335 uint32_t CurrentState = hi2c->State; 04336 04337 if(hi2c->XferCount != 0U) 04338 { 04339 /* Read data from DR */ 04340 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04341 hi2c->XferCount--; 04342 04343 if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 04344 { 04345 /* Last Byte is received, disable Interrupt */ 04346 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 04347 04348 /* Set state at HAL_I2C_STATE_LISTEN */ 04349 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; 04350 hi2c->State = HAL_I2C_STATE_LISTEN; 04351 04352 /* Call the Rx complete callback to inform upper layer of the end of receive process */ 04353 HAL_I2C_SlaveRxCpltCallback(hi2c); 04354 } 04355 } 04356 return HAL_OK; 04357 } 04358 04359 /** 04360 * @brief Handle BTF flag for Slave receiver 04361 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04362 * the configuration information for I2C module 04363 * @retval HAL status 04364 */ 04365 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) 04366 { 04367 if(hi2c->XferCount != 0U) 04368 { 04369 /* Read data from DR */ 04370 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04371 hi2c->XferCount--; 04372 } 04373 return HAL_OK; 04374 } 04375 04376 /** 04377 * @brief Handle ADD flag for Slave 04378 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04379 * the configuration information for I2C module 04380 * @retval HAL status 04381 */ 04382 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) 04383 { 04384 uint8_t TransferDirection = I2C_DIRECTION_RECEIVE; 04385 uint16_t SlaveAddrCode = 0U; 04386 04387 /* Transfer Direction requested by Master */ 04388 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET) 04389 { 04390 TransferDirection = I2C_DIRECTION_TRANSMIT; 04391 } 04392 04393 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET) 04394 { 04395 SlaveAddrCode = hi2c->Init.OwnAddress1; 04396 } 04397 else 04398 { 04399 SlaveAddrCode = hi2c->Init.OwnAddress2; 04400 } 04401 04402 /* Call Slave Addr callback */ 04403 HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode); 04404 04405 return HAL_OK; 04406 } 04407 04408 /** 04409 * @brief Handle STOPF flag for Slave 04410 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04411 * the configuration information for I2C module 04412 * @retval HAL status 04413 */ 04414 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) 04415 { 04416 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 04417 uint32_t CurrentState = hi2c->State; 04418 04419 /* Disable EVT, BUF and ERR interrupt */ 04420 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 04421 04422 /* Clear STOPF flag */ 04423 __HAL_I2C_CLEAR_STOPFLAG(hi2c); 04424 04425 /* Disable Acknowledge */ 04426 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04427 04428 /* If a DMA is ongoing, Update handle size context */ 04429 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 04430 { 04431 if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) 04432 { 04433 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx); 04434 } 04435 else 04436 { 04437 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx); 04438 } 04439 } 04440 04441 /* All data are not transferred, so set error code accordingly */ 04442 if(hi2c->XferCount != 0U) 04443 { 04444 /* Store Last receive data if any */ 04445 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 04446 { 04447 /* Read data from DR */ 04448 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04449 hi2c->XferCount--; 04450 } 04451 04452 /* Store Last receive data if any */ 04453 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 04454 { 04455 /* Read data from DR */ 04456 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04457 hi2c->XferCount--; 04458 } 04459 04460 /* Set ErrorCode corresponding to a Non-Acknowledge */ 04461 hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 04462 } 04463 04464 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 04465 { 04466 /* Call the corresponding callback to inform upper layer of End of Transfer */ 04467 I2C_ITError(hi2c); 04468 } 04469 else 04470 { 04471 if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \ 04472 (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) 04473 { 04474 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 04475 hi2c->PreviousState = I2C_STATE_NONE; 04476 hi2c->State = HAL_I2C_STATE_READY; 04477 hi2c->Mode = HAL_I2C_MODE_NONE; 04478 04479 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ 04480 HAL_I2C_ListenCpltCallback(hi2c); 04481 } 04482 else 04483 { 04484 if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX)) 04485 { 04486 hi2c->PreviousState = I2C_STATE_NONE; 04487 hi2c->State = HAL_I2C_STATE_READY; 04488 hi2c->Mode = HAL_I2C_MODE_NONE; 04489 04490 HAL_I2C_SlaveRxCpltCallback(hi2c); 04491 } 04492 } 04493 } 04494 return HAL_OK; 04495 } 04496 04497 /** 04498 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04499 * the configuration information for I2C module 04500 * @retval HAL status 04501 */ 04502 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) 04503 { 04504 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ 04505 uint32_t CurrentState = hi2c->State; 04506 uint32_t CurrentXferOptions = hi2c->XferOptions; 04507 04508 if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \ 04509 (CurrentState == HAL_I2C_STATE_LISTEN)) 04510 { 04511 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 04512 04513 /* Disable EVT, BUF and ERR interrupt */ 04514 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 04515 04516 /* Clear AF flag */ 04517 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 04518 04519 /* Disable Acknowledge */ 04520 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04521 04522 hi2c->PreviousState = I2C_STATE_NONE; 04523 hi2c->State = HAL_I2C_STATE_READY; 04524 hi2c->Mode = HAL_I2C_MODE_NONE; 04525 04526 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ 04527 HAL_I2C_ListenCpltCallback(hi2c); 04528 } 04529 else if(CurrentState == HAL_I2C_STATE_BUSY_TX) 04530 { 04531 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 04532 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; 04533 hi2c->State = HAL_I2C_STATE_READY; 04534 hi2c->Mode = HAL_I2C_MODE_NONE; 04535 04536 /* Disable EVT, BUF and ERR interrupt */ 04537 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 04538 04539 /* Clear AF flag */ 04540 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 04541 04542 /* Disable Acknowledge */ 04543 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 04544 04545 HAL_I2C_SlaveTxCpltCallback(hi2c); 04546 } 04547 else 04548 { 04549 /* Clear AF flag only */ 04550 /* State Listen, but XferOptions == FIRST or NEXT */ 04551 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 04552 } 04553 04554 return HAL_OK; 04555 } 04556 04557 /** 04558 * @brief I2C interrupts error process 04559 * @param hi2c I2C handle. 04560 * @retval None 04561 */ 04562 static void I2C_ITError(I2C_HandleTypeDef *hi2c) 04563 { 04564 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 04565 uint32_t CurrentState = hi2c->State; 04566 04567 if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 04568 { 04569 /* keep HAL_I2C_STATE_LISTEN */ 04570 hi2c->PreviousState = I2C_STATE_NONE; 04571 hi2c->State = HAL_I2C_STATE_LISTEN; 04572 } 04573 else 04574 { 04575 /* If state is an abort treatment on going, don't change state */ 04576 /* This change will be do later */ 04577 if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN)) 04578 { 04579 hi2c->State = HAL_I2C_STATE_READY; 04580 } 04581 hi2c->PreviousState = I2C_STATE_NONE; 04582 hi2c->Mode = HAL_I2C_MODE_NONE; 04583 } 04584 04585 /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */ 04586 hi2c->Instance->CR1 &= ~I2C_CR1_POS; 04587 04588 /* Abort DMA transfer */ 04589 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 04590 { 04591 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 04592 04593 if(hi2c->hdmatx->State != HAL_DMA_STATE_READY) 04594 { 04595 /* Set the DMA Abort callback : 04596 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ 04597 hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; 04598 04599 if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) 04600 { 04601 /* Disable I2C peripheral to prevent dummy data in buffer */ 04602 __HAL_I2C_DISABLE(hi2c); 04603 04604 hi2c->State = HAL_I2C_STATE_READY; 04605 04606 /* Call Directly XferAbortCallback function in case of error */ 04607 hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); 04608 } 04609 } 04610 else 04611 { 04612 /* Set the DMA Abort callback : 04613 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ 04614 hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; 04615 04616 if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) 04617 { 04618 /* Store Last receive data if any */ 04619 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 04620 { 04621 /* Read data from DR */ 04622 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04623 } 04624 04625 /* Disable I2C peripheral to prevent dummy data in buffer */ 04626 __HAL_I2C_DISABLE(hi2c); 04627 04628 hi2c->State = HAL_I2C_STATE_READY; 04629 04630 /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ 04631 hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); 04632 } 04633 } 04634 } 04635 else if(hi2c->State == HAL_I2C_STATE_ABORT) 04636 { 04637 hi2c->State = HAL_I2C_STATE_READY; 04638 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 04639 04640 /* Store Last receive data if any */ 04641 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 04642 { 04643 /* Read data from DR */ 04644 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04645 } 04646 04647 /* Disable I2C peripheral to prevent dummy data in buffer */ 04648 __HAL_I2C_DISABLE(hi2c); 04649 04650 /* Call the corresponding callback to inform upper layer of End of Transfer */ 04651 HAL_I2C_AbortCpltCallback(hi2c); 04652 } 04653 else 04654 { 04655 /* Store Last receive data if any */ 04656 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 04657 { 04658 /* Read data from DR */ 04659 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 04660 } 04661 04662 /* Call user error callback */ 04663 HAL_I2C_ErrorCallback(hi2c); 04664 } 04665 /* STOP Flag is not set after a NACK reception */ 04666 /* So may inform upper layer that listen phase is stopped */ 04667 /* during NACK error treatment */ 04668 if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF)) 04669 { 04670 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 04671 hi2c->PreviousState = I2C_STATE_NONE; 04672 hi2c->State = HAL_I2C_STATE_READY; 04673 hi2c->Mode = HAL_I2C_MODE_NONE; 04674 04675 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ 04676 HAL_I2C_ListenCpltCallback(hi2c); 04677 } 04678 } 04679 04680 /** 04681 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04682 * the configuration information for I2C module 04683 * @param DevAddress Target device address The device 7 bits address value 04684 * in datasheet must be shifted to the left before calling the interface 04685 * @param Timeout Timeout duration 04686 * @param Tickstart Tick start value 04687 * @retval HAL status 04688 */ 04689 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) 04690 { 04691 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 04692 uint32_t CurrentXferOptions = hi2c->XferOptions; 04693 04694 /* Generate Start condition if first transfer */ 04695 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) 04696 { 04697 /* Generate Start */ 04698 hi2c->Instance->CR1 |= I2C_CR1_START; 04699 } 04700 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) 04701 { 04702 /* Generate ReStart */ 04703 hi2c->Instance->CR1 |= I2C_CR1_START; 04704 } 04705 04706 /* Wait until SB flag is set */ 04707 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 04708 { 04709 return HAL_TIMEOUT; 04710 } 04711 04712 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 04713 { 04714 /* Send slave address */ 04715 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 04716 } 04717 else 04718 { 04719 /* Send header of slave address */ 04720 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); 04721 04722 /* Wait until ADD10 flag is set */ 04723 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) 04724 { 04725 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04726 { 04727 return HAL_ERROR; 04728 } 04729 else 04730 { 04731 return HAL_TIMEOUT; 04732 } 04733 } 04734 04735 /* Send slave address */ 04736 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); 04737 } 04738 04739 /* Wait until ADDR flag is set */ 04740 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 04741 { 04742 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04743 { 04744 return HAL_ERROR; 04745 } 04746 else 04747 { 04748 return HAL_TIMEOUT; 04749 } 04750 } 04751 04752 return HAL_OK; 04753 } 04754 04755 /** 04756 * @brief Master sends target device address for read request. 04757 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04758 * the configuration information for I2C module 04759 * @param DevAddress Target device address The device 7 bits address value 04760 * in datasheet must be shifted to the left before calling the interface 04761 * @param Timeout Timeout duration 04762 * @param Tickstart Tick start value 04763 * @retval HAL status 04764 */ 04765 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) 04766 { 04767 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 04768 uint32_t CurrentXferOptions = hi2c->XferOptions; 04769 04770 /* Enable Acknowledge */ 04771 hi2c->Instance->CR1 |= I2C_CR1_ACK; 04772 04773 /* Generate Start condition if first transfer */ 04774 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) 04775 { 04776 /* Generate Start */ 04777 hi2c->Instance->CR1 |= I2C_CR1_START; 04778 } 04779 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) 04780 { 04781 /* Generate ReStart */ 04782 hi2c->Instance->CR1 |= I2C_CR1_START; 04783 } 04784 04785 /* Wait until SB flag is set */ 04786 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 04787 { 04788 return HAL_TIMEOUT; 04789 } 04790 04791 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 04792 { 04793 /* Send slave address */ 04794 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 04795 } 04796 else 04797 { 04798 /* Send header of slave address */ 04799 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); 04800 04801 /* Wait until ADD10 flag is set */ 04802 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) 04803 { 04804 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04805 { 04806 return HAL_ERROR; 04807 } 04808 else 04809 { 04810 return HAL_TIMEOUT; 04811 } 04812 } 04813 04814 /* Send slave address */ 04815 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); 04816 04817 /* Wait until ADDR flag is set */ 04818 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 04819 { 04820 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04821 { 04822 return HAL_ERROR; 04823 } 04824 else 04825 { 04826 return HAL_TIMEOUT; 04827 } 04828 } 04829 04830 /* Clear ADDR flag */ 04831 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04832 04833 /* Generate Restart */ 04834 hi2c->Instance->CR1 |= I2C_CR1_START; 04835 04836 /* Wait until SB flag is set */ 04837 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 04838 { 04839 return HAL_TIMEOUT; 04840 } 04841 04842 /* Send header of slave address */ 04843 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); 04844 } 04845 04846 /* Wait until ADDR flag is set */ 04847 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 04848 { 04849 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04850 { 04851 return HAL_ERROR; 04852 } 04853 else 04854 { 04855 return HAL_TIMEOUT; 04856 } 04857 } 04858 04859 return HAL_OK; 04860 } 04861 04862 /** 04863 * @brief Master sends target device address followed by internal memory address for write request. 04864 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04865 * the configuration information for I2C module 04866 * @param DevAddress Target device address 04867 * @param MemAddress Internal memory address 04868 * @param MemAddSize Size of internal memory address 04869 * @param Timeout Timeout duration 04870 * @param Tickstart Tick start value 04871 * @retval HAL status 04872 */ 04873 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) 04874 { 04875 /* Generate Start */ 04876 hi2c->Instance->CR1 |= I2C_CR1_START; 04877 04878 /* Wait until SB flag is set */ 04879 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 04880 { 04881 return HAL_TIMEOUT; 04882 } 04883 04884 /* Send slave address */ 04885 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 04886 04887 /* Wait until ADDR flag is set */ 04888 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 04889 { 04890 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04891 { 04892 return HAL_ERROR; 04893 } 04894 else 04895 { 04896 return HAL_TIMEOUT; 04897 } 04898 } 04899 04900 /* Clear ADDR flag */ 04901 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04902 04903 /* Wait until TXE flag is set */ 04904 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 04905 { 04906 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04907 { 04908 /* Generate Stop */ 04909 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04910 return HAL_ERROR; 04911 } 04912 else 04913 { 04914 return HAL_TIMEOUT; 04915 } 04916 } 04917 04918 /* If Memory address size is 8Bit */ 04919 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 04920 { 04921 /* Send Memory Address */ 04922 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 04923 } 04924 /* If Memory address size is 16Bit */ 04925 else 04926 { 04927 /* Send MSB of Memory Address */ 04928 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 04929 04930 /* Wait until TXE flag is set */ 04931 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 04932 { 04933 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04934 { 04935 /* Generate Stop */ 04936 hi2c->Instance->CR1 |= I2C_CR1_STOP; 04937 return HAL_ERROR; 04938 } 04939 else 04940 { 04941 return HAL_TIMEOUT; 04942 } 04943 } 04944 04945 /* Send LSB of Memory Address */ 04946 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 04947 } 04948 04949 return HAL_OK; 04950 } 04951 04952 /** 04953 * @brief Master sends target device address followed by internal memory address for read request. 04954 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 04955 * the configuration information for I2C module 04956 * @param DevAddress Target device address 04957 * @param MemAddress Internal memory address 04958 * @param MemAddSize Size of internal memory address 04959 * @param Timeout Timeout duration 04960 * @param Tickstart Tick start value 04961 * @retval HAL status 04962 */ 04963 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) 04964 { 04965 /* Enable Acknowledge */ 04966 hi2c->Instance->CR1 |= I2C_CR1_ACK; 04967 04968 /* Generate Start */ 04969 hi2c->Instance->CR1 |= I2C_CR1_START; 04970 04971 /* Wait until SB flag is set */ 04972 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 04973 { 04974 return HAL_TIMEOUT; 04975 } 04976 04977 /* Send slave address */ 04978 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 04979 04980 /* Wait until ADDR flag is set */ 04981 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 04982 { 04983 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 04984 { 04985 return HAL_ERROR; 04986 } 04987 else 04988 { 04989 return HAL_TIMEOUT; 04990 } 04991 } 04992 04993 /* Clear ADDR flag */ 04994 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 04995 04996 /* Wait until TXE flag is set */ 04997 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 04998 { 04999 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 05000 { 05001 /* Generate Stop */ 05002 hi2c->Instance->CR1 |= I2C_CR1_STOP; 05003 return HAL_ERROR; 05004 } 05005 else 05006 { 05007 return HAL_TIMEOUT; 05008 } 05009 } 05010 05011 /* If Memory address size is 8Bit */ 05012 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 05013 { 05014 /* Send Memory Address */ 05015 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 05016 } 05017 /* If Memory address size is 16Bit */ 05018 else 05019 { 05020 /* Send MSB of Memory Address */ 05021 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 05022 05023 /* Wait until TXE flag is set */ 05024 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 05025 { 05026 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 05027 { 05028 /* Generate Stop */ 05029 hi2c->Instance->CR1 |= I2C_CR1_STOP; 05030 return HAL_ERROR; 05031 } 05032 else 05033 { 05034 return HAL_TIMEOUT; 05035 } 05036 } 05037 05038 /* Send LSB of Memory Address */ 05039 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 05040 } 05041 05042 /* Wait until TXE flag is set */ 05043 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 05044 { 05045 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 05046 { 05047 /* Generate Stop */ 05048 hi2c->Instance->CR1 |= I2C_CR1_STOP; 05049 return HAL_ERROR; 05050 } 05051 else 05052 { 05053 return HAL_TIMEOUT; 05054 } 05055 } 05056 05057 /* Generate Restart */ 05058 hi2c->Instance->CR1 |= I2C_CR1_START; 05059 05060 /* Wait until SB flag is set */ 05061 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 05062 { 05063 return HAL_TIMEOUT; 05064 } 05065 05066 /* Send slave address */ 05067 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 05068 05069 /* Wait until ADDR flag is set */ 05070 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 05071 { 05072 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 05073 { 05074 return HAL_ERROR; 05075 } 05076 else 05077 { 05078 return HAL_TIMEOUT; 05079 } 05080 } 05081 05082 return HAL_OK; 05083 } 05084 05085 /** 05086 * @brief DMA I2C process complete callback. 05087 * @param hdma DMA handle 05088 * @retval None 05089 */ 05090 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma) 05091 { 05092 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; 05093 05094 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ 05095 uint32_t CurrentState = hi2c->State; 05096 uint32_t CurrentMode = hi2c->Mode; 05097 05098 if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE))) 05099 { 05100 /* Disable DMA Request */ 05101 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 05102 05103 hi2c->XferCount = 0U; 05104 05105 /* Enable EVT and ERR interrupt */ 05106 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 05107 } 05108 else 05109 { 05110 /* Disable Acknowledge */ 05111 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 05112 05113 /* Generate Stop */ 05114 hi2c->Instance->CR1 |= I2C_CR1_STOP; 05115 05116 /* Disable Last DMA */ 05117 hi2c->Instance->CR2 &= ~I2C_CR2_LAST; 05118 05119 /* Disable DMA Request */ 05120 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 05121 05122 hi2c->XferCount = 0U; 05123 05124 /* Check if Errors has been detected during transfer */ 05125 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 05126 { 05127 HAL_I2C_ErrorCallback(hi2c); 05128 } 05129 else 05130 { 05131 hi2c->State = HAL_I2C_STATE_READY; 05132 05133 if(hi2c->Mode == HAL_I2C_MODE_MEM) 05134 { 05135 hi2c->Mode = HAL_I2C_MODE_NONE; 05136 05137 HAL_I2C_MemRxCpltCallback(hi2c); 05138 } 05139 else 05140 { 05141 hi2c->Mode = HAL_I2C_MODE_NONE; 05142 05143 HAL_I2C_MasterRxCpltCallback(hi2c); 05144 } 05145 } 05146 } 05147 } 05148 05149 /** 05150 * @brief DMA I2C communication error callback. 05151 * @param hdma DMA handle 05152 * @retval None 05153 */ 05154 static void I2C_DMAError(DMA_HandleTypeDef *hdma) 05155 { 05156 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; 05157 05158 /* Ignore DMA FIFO error */ 05159 if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE) 05160 { 05161 /* Disable Acknowledge */ 05162 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 05163 05164 hi2c->XferCount = 0U; 05165 05166 hi2c->State = HAL_I2C_STATE_READY; 05167 hi2c->Mode = HAL_I2C_MODE_NONE; 05168 05169 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; 05170 05171 HAL_I2C_ErrorCallback(hi2c); 05172 } 05173 } 05174 05175 /** 05176 * @brief DMA I2C communication abort callback 05177 * (To be called at end of DMA Abort procedure). 05178 * @param hdma DMA handle. 05179 * @retval None 05180 */ 05181 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) 05182 { 05183 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 05184 05185 /* Disable Acknowledge */ 05186 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 05187 05188 hi2c->XferCount = 0U; 05189 05190 /* Reset XferAbortCallback */ 05191 hi2c->hdmatx->XferAbortCallback = NULL; 05192 hi2c->hdmarx->XferAbortCallback = NULL; 05193 05194 /* Check if come from abort from user */ 05195 if(hi2c->State == HAL_I2C_STATE_ABORT) 05196 { 05197 hi2c->State = HAL_I2C_STATE_READY; 05198 hi2c->Mode = HAL_I2C_MODE_NONE; 05199 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 05200 05201 /* Disable I2C peripheral to prevent dummy data in buffer */ 05202 __HAL_I2C_DISABLE(hi2c); 05203 05204 /* Call the corresponding callback to inform upper layer of End of Transfer */ 05205 HAL_I2C_AbortCpltCallback(hi2c); 05206 } 05207 else 05208 { 05209 hi2c->State = HAL_I2C_STATE_READY; 05210 hi2c->Mode = HAL_I2C_MODE_NONE; 05211 05212 /* Disable I2C peripheral to prevent dummy data in buffer */ 05213 __HAL_I2C_DISABLE(hi2c); 05214 05215 /* Call the corresponding callback to inform upper layer of End of Transfer */ 05216 HAL_I2C_ErrorCallback(hi2c); 05217 } 05218 } 05219 05220 /** 05221 * @brief This function handles I2C Communication Timeout. 05222 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05223 * the configuration information for I2C module 05224 * @param Flag specifies the I2C flag to check. 05225 * @param Status The new Flag status (SET or RESET). 05226 * @param Timeout Timeout duration 05227 * @param Tickstart Tick start value 05228 * @retval HAL status 05229 */ 05230 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) 05231 { 05232 /* Wait until flag is set */ 05233 while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 05234 { 05235 /* Check for the Timeout */ 05236 if(Timeout != HAL_MAX_DELAY) 05237 { 05238 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 05239 { 05240 hi2c->PreviousState = I2C_STATE_NONE; 05241 hi2c->State= HAL_I2C_STATE_READY; 05242 hi2c->Mode = HAL_I2C_MODE_NONE; 05243 05244 /* Process Unlocked */ 05245 __HAL_UNLOCK(hi2c); 05246 05247 return HAL_TIMEOUT; 05248 } 05249 } 05250 } 05251 05252 return HAL_OK; 05253 } 05254 05255 /** 05256 * @brief This function handles I2C Communication Timeout for Master addressing phase. 05257 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05258 * the configuration information for I2C module 05259 * @param Flag specifies the I2C flag to check. 05260 * @param Timeout Timeout duration 05261 * @param Tickstart Tick start value 05262 * @retval HAL status 05263 */ 05264 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) 05265 { 05266 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 05267 { 05268 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 05269 { 05270 /* Generate Stop */ 05271 hi2c->Instance->CR1 |= I2C_CR1_STOP; 05272 05273 /* Clear AF Flag */ 05274 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 05275 05276 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 05277 hi2c->PreviousState = I2C_STATE_NONE; 05278 hi2c->State= HAL_I2C_STATE_READY; 05279 05280 /* Process Unlocked */ 05281 __HAL_UNLOCK(hi2c); 05282 05283 return HAL_ERROR; 05284 } 05285 05286 /* Check for the Timeout */ 05287 if(Timeout != HAL_MAX_DELAY) 05288 { 05289 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 05290 { 05291 hi2c->PreviousState = I2C_STATE_NONE; 05292 hi2c->State= HAL_I2C_STATE_READY; 05293 05294 /* Process Unlocked */ 05295 __HAL_UNLOCK(hi2c); 05296 05297 return HAL_TIMEOUT; 05298 } 05299 } 05300 } 05301 return HAL_OK; 05302 } 05303 05304 /** 05305 * @brief This function handles I2C Communication Timeout for specific usage of TXE flag. 05306 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05307 * the configuration information for the specified I2C. 05308 * @param Timeout Timeout duration 05309 * @param Tickstart Tick start value 05310 * @retval HAL status 05311 */ 05312 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) 05313 { 05314 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 05315 { 05316 /* Check if a NACK is detected */ 05317 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 05318 { 05319 return HAL_ERROR; 05320 } 05321 05322 /* Check for the Timeout */ 05323 if(Timeout != HAL_MAX_DELAY) 05324 { 05325 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 05326 { 05327 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 05328 hi2c->PreviousState = I2C_STATE_NONE; 05329 hi2c->State= HAL_I2C_STATE_READY; 05330 05331 /* Process Unlocked */ 05332 __HAL_UNLOCK(hi2c); 05333 05334 return HAL_TIMEOUT; 05335 } 05336 } 05337 } 05338 return HAL_OK; 05339 } 05340 05341 /** 05342 * @brief This function handles I2C Communication Timeout for specific usage of BTF flag. 05343 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05344 * the configuration information for the specified I2C. 05345 * @param Timeout Timeout duration 05346 * @param Tickstart Tick start value 05347 * @retval HAL status 05348 */ 05349 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) 05350 { 05351 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 05352 { 05353 /* Check if a NACK is detected */ 05354 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 05355 { 05356 return HAL_ERROR; 05357 } 05358 05359 /* Check for the Timeout */ 05360 if(Timeout != HAL_MAX_DELAY) 05361 { 05362 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 05363 { 05364 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 05365 hi2c->PreviousState = I2C_STATE_NONE; 05366 hi2c->State= HAL_I2C_STATE_READY; 05367 05368 /* Process Unlocked */ 05369 __HAL_UNLOCK(hi2c); 05370 05371 return HAL_TIMEOUT; 05372 } 05373 } 05374 } 05375 return HAL_OK; 05376 } 05377 05378 /** 05379 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. 05380 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05381 * the configuration information for the specified I2C. 05382 * @param Timeout Timeout duration 05383 * @param Tickstart Tick start value 05384 * @retval HAL status 05385 */ 05386 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) 05387 { 05388 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 05389 { 05390 /* Check if a NACK is detected */ 05391 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 05392 { 05393 return HAL_ERROR; 05394 } 05395 05396 /* Check for the Timeout */ 05397 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 05398 { 05399 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 05400 hi2c->PreviousState = I2C_STATE_NONE; 05401 hi2c->State= HAL_I2C_STATE_READY; 05402 05403 /* Process Unlocked */ 05404 __HAL_UNLOCK(hi2c); 05405 05406 return HAL_TIMEOUT; 05407 } 05408 } 05409 return HAL_OK; 05410 } 05411 05412 /** 05413 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. 05414 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05415 * the configuration information for the specified I2C. 05416 * @param Timeout Timeout duration 05417 * @param Tickstart Tick start value 05418 * @retval HAL status 05419 */ 05420 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) 05421 { 05422 05423 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 05424 { 05425 /* Check if a STOPF is detected */ 05426 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 05427 { 05428 /* Clear STOP Flag */ 05429 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 05430 05431 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 05432 hi2c->PreviousState = I2C_STATE_NONE; 05433 hi2c->State= HAL_I2C_STATE_READY; 05434 05435 /* Process Unlocked */ 05436 __HAL_UNLOCK(hi2c); 05437 05438 return HAL_ERROR; 05439 } 05440 05441 /* Check for the Timeout */ 05442 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 05443 { 05444 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 05445 hi2c->State= HAL_I2C_STATE_READY; 05446 05447 /* Process Unlocked */ 05448 __HAL_UNLOCK(hi2c); 05449 05450 return HAL_TIMEOUT; 05451 } 05452 } 05453 return HAL_OK; 05454 } 05455 05456 /** 05457 * @brief This function handles Acknowledge failed detection during an I2C Communication. 05458 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 05459 * the configuration information for the specified I2C. 05460 * @retval HAL status 05461 */ 05462 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) 05463 { 05464 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 05465 { 05466 /* Clear NACKF Flag */ 05467 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 05468 05469 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 05470 hi2c->PreviousState = I2C_STATE_NONE; 05471 hi2c->State= HAL_I2C_STATE_READY; 05472 05473 /* Process Unlocked */ 05474 __HAL_UNLOCK(hi2c); 05475 05476 return HAL_ERROR; 05477 } 05478 return HAL_OK; 05479 } 05480 /** 05481 * @} 05482 */ 05483 05484 #endif /* HAL_I2C_MODULE_ENABLED */ 05485 05486 /** 05487 * @} 05488 */ 05489 05490 /** 05491 * @} 05492 */ 05493 05494 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/