|
STM32F439xx HAL User Manual
|
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_fmpi2c.h 00004 * @author MCD Application Team 00005 * @brief Header file of FMPI2C HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32F4xx_HAL_FMPI2C_H 00038 #define __STM32F4xx_HAL_FMPI2C_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 00045 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 00046 00047 /* Includes ------------------------------------------------------------------*/ 00048 #include "stm32f4xx_hal_def.h" 00049 00050 /** @addtogroup STM32F4xx_HAL_Driver 00051 * @{ 00052 */ 00053 00054 /** @addtogroup FMPI2C 00055 * @{ 00056 */ 00057 00058 /* Exported types ------------------------------------------------------------*/ 00059 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types 00060 * @{ 00061 */ 00062 00063 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition 00064 * @brief FMPI2C Configuration Structure definition 00065 * @{ 00066 */ 00067 typedef struct 00068 { 00069 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value. 00070 This parameter calculated by referring to FMPI2C initialization 00071 section in Reference manual */ 00072 00073 uint32_t OwnAddress1; /*!< Specifies the first device own address. 00074 This parameter can be a 7-bit or 10-bit address. */ 00075 00076 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 00077 This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */ 00078 00079 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 00080 This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */ 00081 00082 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 00083 This parameter can be a 7-bit address. */ 00084 00085 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected 00086 This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */ 00087 00088 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 00089 This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */ 00090 00091 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 00092 This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */ 00093 00094 } FMPI2C_InitTypeDef; 00095 00096 /** 00097 * @} 00098 */ 00099 00100 /** @defgroup HAL_state_structure_definition HAL state structure definition 00101 * @brief HAL State structure definition 00102 * @note HAL FMPI2C State value coding follow below described bitmap :\n 00103 * b7-b6 Error information\n 00104 * 00 : No Error\n 00105 * 01 : Abort (Abort user request on going)\n 00106 * 10 : Timeout\n 00107 * 11 : Error\n 00108 * b5 IP initilisation status\n 00109 * 0 : Reset (IP not initialized)\n 00110 * 1 : Init done (IP initialized and ready to use. HAL FMPI2C Init function called)\n 00111 * b4 (not used)\n 00112 * x : Should be set to 0\n 00113 * b3\n 00114 * 0 : Ready or Busy (No Listen mode ongoing)\n 00115 * 1 : Listen (IP in Address Listen Mode)\n 00116 * b2 Intrinsic process state\n 00117 * 0 : Ready\n 00118 * 1 : Busy (IP busy with some configuration or internal operations)\n 00119 * b1 Rx state\n 00120 * 0 : Ready (no Rx operation ongoing)\n 00121 * 1 : Busy (Rx operation ongoing)\n 00122 * b0 Tx state\n 00123 * 0 : Ready (no Tx operation ongoing)\n 00124 * 1 : Busy (Tx operation ongoing) 00125 * @{ 00126 */ 00127 typedef enum 00128 { 00129 HAL_FMPI2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 00130 HAL_FMPI2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 00131 HAL_FMPI2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 00132 HAL_FMPI2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 00133 HAL_FMPI2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00134 HAL_FMPI2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 00135 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 00136 process is ongoing */ 00137 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 00138 process is ongoing */ 00139 HAL_FMPI2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 00140 HAL_FMPI2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 00141 HAL_FMPI2C_STATE_ERROR = 0xE0U /*!< Error */ 00142 00143 } HAL_FMPI2C_StateTypeDef; 00144 00145 /** 00146 * @} 00147 */ 00148 00149 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 00150 * @brief HAL Mode structure definition 00151 * @note HAL FMPI2C Mode value coding follow below described bitmap :\n 00152 * b7 (not used)\n 00153 * x : Should be set to 0\n 00154 * b6\n 00155 * 0 : None\n 00156 * 1 : Memory (HAL FMPI2C communication is in Memory Mode)\n 00157 * b5\n 00158 * 0 : None\n 00159 * 1 : Slave (HAL FMPI2C communication is in Slave Mode)\n 00160 * b4\n 00161 * 0 : None\n 00162 * 1 : Master (HAL FMPI2C communication is in Master Mode)\n 00163 * b3-b2-b1-b0 (not used)\n 00164 * xxxx : Should be set to 0000 00165 * @{ 00166 */ 00167 typedef enum 00168 { 00169 HAL_FMPI2C_MODE_NONE = 0x00U, /*!< No FMPI2C communication on going */ 00170 HAL_FMPI2C_MODE_MASTER = 0x10U, /*!< FMPI2C communication is in Master Mode */ 00171 HAL_FMPI2C_MODE_SLAVE = 0x20U, /*!< FMPI2C communication is in Slave Mode */ 00172 HAL_FMPI2C_MODE_MEM = 0x40U /*!< FMPI2C communication is in Memory Mode */ 00173 00174 } HAL_FMPI2C_ModeTypeDef; 00175 00176 /** 00177 * @} 00178 */ 00179 00180 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition 00181 * @brief FMPI2C Error Code definition 00182 * @{ 00183 */ 00184 #define HAL_FMPI2C_ERROR_NONE (0x00000000U) /*!< No error */ 00185 #define HAL_FMPI2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 00186 #define HAL_FMPI2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 00187 #define HAL_FMPI2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 00188 #define HAL_FMPI2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 00189 #define HAL_FMPI2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00190 #define HAL_FMPI2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 00191 #define HAL_FMPI2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 00192 /** 00193 * @} 00194 */ 00195 00196 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition 00197 * @brief FMPI2C handle Structure definition 00198 * @{ 00199 */ 00200 typedef struct __FMPI2C_HandleTypeDef 00201 { 00202 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */ 00203 00204 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */ 00205 00206 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */ 00207 00208 uint16_t XferSize; /*!< FMPI2C transfer size */ 00209 00210 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */ 00211 00212 __IO uint32_t XferOptions; /*!< FMPI2C sequantial transfer options, this parameter can 00213 be a value of @ref FMPI2C_XFEROPTIONS */ 00214 00215 __IO uint32_t PreviousState; /*!< FMPI2C communication Previous state */ 00216 00217 HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); /*!< FMPI2C transfer IRQ handler function pointer */ 00218 00219 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */ 00220 00221 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */ 00222 00223 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */ 00224 00225 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */ 00226 00227 __IO HAL_FMPI2C_ModeTypeDef Mode; /*!< FMPI2C communication mode */ 00228 00229 __IO uint32_t ErrorCode; /*!< FMPI2C Error code */ 00230 00231 __IO uint32_t AddrEventCount; /*!< FMPI2C Address Event counter */ 00232 } FMPI2C_HandleTypeDef; 00233 /** 00234 * @} 00235 */ 00236 00237 /** 00238 * @} 00239 */ 00240 /* Exported constants --------------------------------------------------------*/ 00241 00242 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants 00243 * @{ 00244 */ 00245 00246 /** @defgroup FMPI2C_XFEROPTIONS FMPI2C Sequential Transfer Options 00247 * @{ 00248 */ 00249 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE) 00250 #define FMPI2C_FIRST_AND_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 00251 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 00252 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 00253 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 00254 #define FMPI2C_LAST_FRAME_NO_STOP ((uint32_t)FMPI2C_SOFTEND_MODE) 00255 /** 00256 * @} 00257 */ 00258 00259 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode 00260 * @{ 00261 */ 00262 #define FMPI2C_ADDRESSINGMODE_7BIT (0x00000001U) 00263 #define FMPI2C_ADDRESSINGMODE_10BIT (0x00000002U) 00264 /** 00265 * @} 00266 */ 00267 00268 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode 00269 * @{ 00270 */ 00271 #define FMPI2C_DUALADDRESS_DISABLE (0x00000000U) 00272 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN 00273 /** 00274 * @} 00275 */ 00276 00277 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks 00278 * @{ 00279 */ 00280 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00) 00281 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01) 00282 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02) 00283 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03) 00284 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04) 00285 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05) 00286 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06) 00287 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07) 00288 /** 00289 * @} 00290 */ 00291 00292 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode 00293 * @{ 00294 */ 00295 #define FMPI2C_GENERALCALL_DISABLE (0x00000000U) 00296 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN 00297 /** 00298 * @} 00299 */ 00300 00301 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode 00302 * @{ 00303 */ 00304 #define FMPI2C_NOSTRETCH_DISABLE (0x00000000U) 00305 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH 00306 /** 00307 * @} 00308 */ 00309 00310 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size 00311 * @{ 00312 */ 00313 #define FMPI2C_MEMADD_SIZE_8BIT (0x00000001U) 00314 #define FMPI2C_MEMADD_SIZE_16BIT (0x00000002U) 00315 /** 00316 * @} 00317 */ 00318 00319 /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View 00320 * @{ 00321 */ 00322 #define FMPI2C_DIRECTION_TRANSMIT (0x00000000U) 00323 #define FMPI2C_DIRECTION_RECEIVE (0x00000001U) 00324 /** 00325 * @} 00326 */ 00327 00328 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode 00329 * @{ 00330 */ 00331 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD 00332 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND 00333 #define FMPI2C_SOFTEND_MODE (0x00000000U) 00334 /** 00335 * @} 00336 */ 00337 00338 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode 00339 * @{ 00340 */ 00341 #define FMPI2C_NO_STARTSTOP (0x00000000U) 00342 #define FMPI2C_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP) 00343 #define FMPI2C_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN) 00344 #define FMPI2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START) 00345 /** 00346 * @} 00347 */ 00348 00349 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition 00350 * @brief FMPI2C Interrupt definition 00351 * Elements values convention: 0xXXXXXXXX 00352 * - XXXXXXXX : Interrupt control mask 00353 * @{ 00354 */ 00355 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE 00356 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE 00357 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE 00358 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE 00359 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE 00360 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE 00361 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE 00362 /** 00363 * @} 00364 */ 00365 00366 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition 00367 * @{ 00368 */ 00369 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE 00370 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS 00371 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE 00372 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR 00373 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF 00374 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF 00375 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC 00376 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR 00377 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR 00378 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO 00379 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR 00380 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR 00381 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT 00382 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT 00383 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY 00384 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR 00385 /** 00386 * @} 00387 */ 00388 00389 /** 00390 * @} 00391 */ 00392 00393 /* Exported macros -----------------------------------------------------------*/ 00394 00395 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros 00396 * @{ 00397 */ 00398 00399 /** @brief Reset FMPI2C handle state. 00400 * @param __HANDLE__ specifies the FMPI2C Handle. 00401 * @retval None 00402 */ 00403 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET) 00404 00405 /** @brief Enable the specified FMPI2C interrupt. 00406 * @param __HANDLE__ specifies the FMPI2C Handle. 00407 * @param __INTERRUPT__ specifies the interrupt source to enable. 00408 * This parameter can be one of the following values: 00409 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00410 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00411 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00412 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00413 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00414 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00415 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00416 * 00417 * @retval None 00418 */ 00419 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 00420 00421 /** @brief Disable the specified FMPI2C interrupt. 00422 * @param __HANDLE__ specifies the FMPI2C Handle. 00423 * @param __INTERRUPT__ specifies the interrupt source to disable. 00424 * This parameter can be one of the following values: 00425 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00426 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00427 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00428 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00429 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00430 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00431 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00432 * 00433 * @retval None 00434 */ 00435 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 00436 00437 /** @brief Check whether the specified FMPI2C interrupt source is enabled or not. 00438 * @param __HANDLE__ specifies the FMPI2C Handle. 00439 * @param __INTERRUPT__ specifies the FMPI2C interrupt source to check. 00440 * This parameter can be one of the following values: 00441 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00442 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00443 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00444 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00445 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00446 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00447 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00448 * 00449 * @retval The new state of __INTERRUPT__ (SET or RESET). 00450 */ 00451 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00452 00453 /** @brief Check whether the specified FMPI2C flag is set or not. 00454 * @param __HANDLE__ specifies the FMPI2C Handle. 00455 * @param __FLAG__ specifies the flag to check. 00456 * This parameter can be one of the following values: 00457 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 00458 * @arg @ref FMPI2C_FLAG_TXIS Transmit interrupt status 00459 * @arg @ref FMPI2C_FLAG_RXNE Receive data register not empty 00460 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 00461 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 00462 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 00463 * @arg @ref FMPI2C_FLAG_TC Transfer complete (master mode) 00464 * @arg @ref FMPI2C_FLAG_TCR Transfer complete reload 00465 * @arg @ref FMPI2C_FLAG_BERR Bus error 00466 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 00467 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 00468 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 00469 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00470 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 00471 * @arg @ref FMPI2C_FLAG_BUSY Bus busy 00472 * @arg @ref FMPI2C_FLAG_DIR Transfer direction (slave mode) 00473 * 00474 * @retval The new state of __FLAG__ (SET or RESET). 00475 */ 00476 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 00477 00478 /** @brief Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit. 00479 * @param __HANDLE__ specifies the FMPI2C Handle. 00480 * @param __FLAG__ specifies the flag to clear. 00481 * This parameter can be any combination of the following values: 00482 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 00483 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 00484 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 00485 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 00486 * @arg @ref FMPI2C_FLAG_BERR Bus error 00487 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 00488 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 00489 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 00490 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00491 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 00492 * 00493 * @retval None 00494 */ 00495 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 00496 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 00497 00498 /** @brief Enable the specified FMPI2C peripheral. 00499 * @param __HANDLE__ specifies the FMPI2C Handle. 00500 * @retval None 00501 */ 00502 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 00503 00504 /** @brief Disable the specified FMPI2C peripheral. 00505 * @param __HANDLE__ specifies the FMPI2C Handle. 00506 * @retval None 00507 */ 00508 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 00509 00510 /** @brief Generate a Non-Acknowledge FMPI2C peripheral in Slave mode. 00511 * @param __HANDLE__ specifies the FMPI2C Handle. 00512 * @retval None 00513 */ 00514 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK)) 00515 /** 00516 * @} 00517 */ 00518 00519 /* Include FMPI2C HAL Extended module */ 00520 #include "stm32f4xx_hal_fmpi2c_ex.h" 00521 00522 /* Exported functions --------------------------------------------------------*/ 00523 /** @addtogroup FMPI2C_Exported_Functions 00524 * @{ 00525 */ 00526 00527 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions 00528 * @{ 00529 */ 00530 /* Initialization and de-initialization functions******************************/ 00531 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c); 00532 HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c); 00533 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c); 00534 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c); 00535 /** 00536 * @} 00537 */ 00538 00539 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions 00540 * @{ 00541 */ 00542 /* IO operation functions ****************************************************/ 00543 /******* Blocking mode: Polling */ 00544 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00545 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00546 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00547 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00548 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00549 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00550 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 00551 00552 /******* Non-Blocking mode: Interrupt */ 00553 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00554 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00555 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00556 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00557 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00558 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00559 00560 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00561 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00562 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00563 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00564 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 00565 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 00566 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress); 00567 00568 /******* Non-Blocking mode: DMA */ 00569 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00570 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00571 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00572 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00573 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00574 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00575 /** 00576 * @} 00577 */ 00578 00579 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 00580 * @{ 00581 */ 00582 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 00583 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 00584 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 00585 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00586 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00587 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00588 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00589 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 00590 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00591 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00592 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00593 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00594 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00595 /** 00596 * @} 00597 */ 00598 00599 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 00600 * @{ 00601 */ 00602 /* Peripheral State, Mode and Error functions *********************************/ 00603 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c); 00604 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c); 00605 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c); 00606 00607 /** 00608 * @} 00609 */ 00610 00611 /** 00612 * @} 00613 */ 00614 00615 /* Private constants ---------------------------------------------------------*/ 00616 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants 00617 * @{ 00618 */ 00619 00620 /** 00621 * @} 00622 */ 00623 00624 /* Private macros ------------------------------------------------------------*/ 00625 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros 00626 * @{ 00627 */ 00628 00629 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \ 00630 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT)) 00631 00632 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \ 00633 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE)) 00634 00635 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \ 00636 ((MASK) == FMPI2C_OA2_MASK01) || \ 00637 ((MASK) == FMPI2C_OA2_MASK02) || \ 00638 ((MASK) == FMPI2C_OA2_MASK03) || \ 00639 ((MASK) == FMPI2C_OA2_MASK04) || \ 00640 ((MASK) == FMPI2C_OA2_MASK05) || \ 00641 ((MASK) == FMPI2C_OA2_MASK06) || \ 00642 ((MASK) == FMPI2C_OA2_MASK07)) 00643 00644 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \ 00645 ((CALL) == FMPI2C_GENERALCALL_ENABLE)) 00646 00647 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \ 00648 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE)) 00649 00650 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \ 00651 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT)) 00652 00653 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \ 00654 ((MODE) == FMPI2C_AUTOEND_MODE) || \ 00655 ((MODE) == FMPI2C_SOFTEND_MODE)) 00656 00657 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \ 00658 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \ 00659 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \ 00660 ((REQUEST) == FMPI2C_NO_STARTSTOP)) 00661 00662 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \ 00663 ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \ 00664 ((REQUEST) == FMPI2C_NEXT_FRAME) || \ 00665 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \ 00666 ((REQUEST) == FMPI2C_LAST_FRAME) || \ 00667 ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP)) 00668 00669 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN))) 00670 00671 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16) 00672 #define FMPI2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16) 00673 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND) 00674 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1) 00675 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2) 00676 00677 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 00678 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) 00679 00680 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8U))) 00681 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) 00682 00683 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \ 00684 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN))) 00685 /** 00686 * @} 00687 */ 00688 00689 /* Private Functions ---------------------------------------------------------*/ 00690 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions 00691 * @{ 00692 */ 00693 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */ 00694 /** 00695 * @} 00696 */ 00697 00698 /** 00699 * @} 00700 */ 00701 00702 /** 00703 * @} 00704 */ 00705 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 00706 #ifdef __cplusplus 00707 } 00708 #endif 00709 00710 00711 #endif /* __STM32F4xx_HAL_FMPI2C_H */ 00712 00713 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1