stm32f4xx_hal_cortex.h File Reference

Header file of CORTEX HAL module. More...

#include "stm32f4xx_hal_def.h"

Go to the source code of this file.

Data Structures
struct	MPU_Region_InitTypeDef
Defines
#define	NVIC_PRIORITYGROUP_0   0x00000007U
#define	NVIC_PRIORITYGROUP_1   0x00000006U
#define	NVIC_PRIORITYGROUP_2   0x00000005U
#define	NVIC_PRIORITYGROUP_3   0x00000004U
#define	NVIC_PRIORITYGROUP_4   0x00000003U
#define	SYSTICK_CLKSOURCE_HCLK_DIV8   0x00000000U
#define	SYSTICK_CLKSOURCE_HCLK   0x00000004U
#define	MPU_HFNMI_PRIVDEF_NONE   0x00000000U
#define	MPU_HARDFAULT_NMI   MPU_CTRL_HFNMIENA_Msk
#define	MPU_PRIVILEGED_DEFAULT   MPU_CTRL_PRIVDEFENA_Msk
#define	MPU_HFNMI_PRIVDEF   (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
#define	MPU_REGION_ENABLE   ((uint8_t)0x01)
#define	MPU_REGION_DISABLE   ((uint8_t)0x00)
#define	MPU_INSTRUCTION_ACCESS_ENABLE   ((uint8_t)0x00)
#define	MPU_INSTRUCTION_ACCESS_DISABLE   ((uint8_t)0x01)
#define	MPU_ACCESS_SHAREABLE   ((uint8_t)0x01)
#define	MPU_ACCESS_NOT_SHAREABLE   ((uint8_t)0x00)
#define	MPU_ACCESS_CACHEABLE   ((uint8_t)0x01)
#define	MPU_ACCESS_NOT_CACHEABLE   ((uint8_t)0x00)
#define	MPU_ACCESS_BUFFERABLE   ((uint8_t)0x01)
#define	MPU_ACCESS_NOT_BUFFERABLE   ((uint8_t)0x00)
#define	MPU_TEX_LEVEL0   ((uint8_t)0x00)
#define	MPU_TEX_LEVEL1   ((uint8_t)0x01)
#define	MPU_TEX_LEVEL2   ((uint8_t)0x02)
#define	MPU_REGION_SIZE_32B   ((uint8_t)0x04)
#define	MPU_REGION_SIZE_64B   ((uint8_t)0x05)
#define	MPU_REGION_SIZE_128B   ((uint8_t)0x06)
#define	MPU_REGION_SIZE_256B   ((uint8_t)0x07)
#define	MPU_REGION_SIZE_512B   ((uint8_t)0x08)
#define	MPU_REGION_SIZE_1KB   ((uint8_t)0x09)
#define	MPU_REGION_SIZE_2KB   ((uint8_t)0x0A)
#define	MPU_REGION_SIZE_4KB   ((uint8_t)0x0B)
#define	MPU_REGION_SIZE_8KB   ((uint8_t)0x0C)
#define	MPU_REGION_SIZE_16KB   ((uint8_t)0x0D)
#define	MPU_REGION_SIZE_32KB   ((uint8_t)0x0E)
#define	MPU_REGION_SIZE_64KB   ((uint8_t)0x0F)
#define	MPU_REGION_SIZE_128KB   ((uint8_t)0x10)
#define	MPU_REGION_SIZE_256KB   ((uint8_t)0x11)
#define	MPU_REGION_SIZE_512KB   ((uint8_t)0x12)
#define	MPU_REGION_SIZE_1MB   ((uint8_t)0x13)
#define	MPU_REGION_SIZE_2MB   ((uint8_t)0x14)
#define	MPU_REGION_SIZE_4MB   ((uint8_t)0x15)
#define	MPU_REGION_SIZE_8MB   ((uint8_t)0x16)
#define	MPU_REGION_SIZE_16MB   ((uint8_t)0x17)
#define	MPU_REGION_SIZE_32MB   ((uint8_t)0x18)
#define	MPU_REGION_SIZE_64MB   ((uint8_t)0x19)
#define	MPU_REGION_SIZE_128MB   ((uint8_t)0x1A)
#define	MPU_REGION_SIZE_256MB   ((uint8_t)0x1B)
#define	MPU_REGION_SIZE_512MB   ((uint8_t)0x1C)
#define	MPU_REGION_SIZE_1GB   ((uint8_t)0x1D)
#define	MPU_REGION_SIZE_2GB   ((uint8_t)0x1E)
#define	MPU_REGION_SIZE_4GB   ((uint8_t)0x1F)
#define	MPU_REGION_NO_ACCESS   ((uint8_t)0x00)
#define	MPU_REGION_PRIV_RW   ((uint8_t)0x01)
#define	MPU_REGION_PRIV_RW_URO   ((uint8_t)0x02)
#define	MPU_REGION_FULL_ACCESS   ((uint8_t)0x03)
#define	MPU_REGION_PRIV_RO   ((uint8_t)0x05)
#define	MPU_REGION_PRIV_RO_URO   ((uint8_t)0x06)
#define	MPU_REGION_NUMBER0   ((uint8_t)0x00)
#define	MPU_REGION_NUMBER1   ((uint8_t)0x01)
#define	MPU_REGION_NUMBER2   ((uint8_t)0x02)
#define	MPU_REGION_NUMBER3   ((uint8_t)0x03)
#define	MPU_REGION_NUMBER4   ((uint8_t)0x04)
#define	MPU_REGION_NUMBER5   ((uint8_t)0x05)
#define	MPU_REGION_NUMBER6   ((uint8_t)0x06)
#define	MPU_REGION_NUMBER7   ((uint8_t)0x07)
#define	IS_NVIC_PRIORITY_GROUP(GROUP)
#define	IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)   ((PRIORITY) < 0x10U)
#define	IS_NVIC_SUB_PRIORITY(PRIORITY)   ((PRIORITY) < 0x10U)
#define	IS_NVIC_DEVICE_IRQ(IRQ)   ((IRQ) >= (IRQn_Type)0x00U)
#define	IS_SYSTICK_CLK_SOURCE(SOURCE)
#define	IS_MPU_REGION_ENABLE(STATE)
#define	IS_MPU_INSTRUCTION_ACCESS(STATE)
#define	IS_MPU_ACCESS_SHAREABLE(STATE)
#define	IS_MPU_ACCESS_CACHEABLE(STATE)
#define	IS_MPU_ACCESS_BUFFERABLE(STATE)
#define	IS_MPU_TEX_LEVEL(TYPE)
#define	IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE)
#define	IS_MPU_REGION_NUMBER(NUMBER)
#define	IS_MPU_REGION_SIZE(SIZE)
#define	IS_MPU_SUB_REGION_DISABLE(SUBREGION)   ((SUBREGION) < (uint16_t)0x00FF)
Functions
void	HAL_NVIC_SetPriorityGrouping (uint32_t PriorityGroup)
	Sets the priority grouping field (preemption priority and subpriority) using the required unlock sequence.
void	HAL_NVIC_SetPriority (IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
	Sets the priority of an interrupt.
void	HAL_NVIC_EnableIRQ (IRQn_Type IRQn)
	Enables a device specific interrupt in the NVIC interrupt controller.
void	HAL_NVIC_DisableIRQ (IRQn_Type IRQn)
	Disables a device specific interrupt in the NVIC interrupt controller.
void	HAL_NVIC_SystemReset (void)
	Initiates a system reset request to reset the MCU.
uint32_t	HAL_SYSTICK_Config (uint32_t TicksNumb)
	Initializes the System Timer and its interrupt, and starts the System Tick Timer.
uint32_t	HAL_NVIC_GetPriorityGrouping (void)
	Gets the priority grouping field from the NVIC Interrupt Controller.
void	HAL_NVIC_GetPriority (IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
	Gets the priority of an interrupt.
uint32_t	HAL_NVIC_GetPendingIRQ (IRQn_Type IRQn)
	Gets Pending Interrupt (reads the pending register in the NVIC and returns the pending bit for the specified interrupt).
void	HAL_NVIC_SetPendingIRQ (IRQn_Type IRQn)
	Sets Pending bit of an external interrupt.
void	HAL_NVIC_ClearPendingIRQ (IRQn_Type IRQn)
	Clears the pending bit of an external interrupt.
uint32_t	HAL_NVIC_GetActive (IRQn_Type IRQn)
	Gets active interrupt ( reads the active register in NVIC and returns the active bit).
void	HAL_SYSTICK_CLKSourceConfig (uint32_t CLKSource)
	Configures the SysTick clock source.
void	HAL_SYSTICK_IRQHandler (void)
	This function handles SYSTICK interrupt request.
__weak void	HAL_SYSTICK_Callback (void)
	SYSTICK callback.
void	HAL_MPU_Enable (uint32_t MPU_Control)
	Enable the MPU.
void	HAL_MPU_Disable (void)
	Disables the MPU.
void	HAL_MPU_ConfigRegion (MPU_Region_InitTypeDef *MPU_Init)
	Initializes and configures the Region and the memory to be protected.

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Detailed Description

Header file of CORTEX HAL module.

Author:

MCD Application Team

Attention:

© COPYRIGHT(c) 2017 STMicroelectronics

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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file stm32f4xx_hal_cortex.h.