STM32F439xx HAL User Manual
stm32f4xx_hal_cec.h
Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal_cec.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of CEC HAL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************  
00034   */
00035 
00036 /* Define to prevent recursive inclusion -------------------------------------*/
00037 #ifndef __STM32F4xx_HAL_CEC_H
00038 #define __STM32F4xx_HAL_CEC_H
00039 
00040 #ifdef __cplusplus
00041  extern "C" {
00042 #endif
00043 
00044 #if defined(STM32F446xx)
00045 /* Includes ------------------------------------------------------------------*/
00046 #include "stm32f4xx_hal_def.h"
00047 
00048 /** @addtogroup STM32F4xx_HAL_Driver
00049   * @{
00050   */
00051 
00052 /** @addtogroup CEC
00053   * @{
00054   */
00055 
00056 /* Exported types ------------------------------------------------------------*/ 
00057 /** @defgroup CEC_Exported_Types CEC Exported Types
00058   * @{
00059   */
00060   
00061 /** 
00062   * @brief CEC Init Structure definition  
00063   */ 
00064 typedef struct
00065 {
00066   uint32_t SignalFreeTime;               /*!< Set SFT field, specifies the Signal Free Time.
00067                                               It can be one of @ref CEC_Signal_Free_Time 
00068                                               and belongs to the set {0,...,7} where  
00069                                               0x0 is the default configuration 
00070                                               else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
00071 
00072   uint32_t Tolerance;                    /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
00073                                               it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE 
00074                                               or CEC_EXTENDED_TOLERANCE */
00075 
00076   uint32_t BRERxStop;                    /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception. 
00077                                               CEC_NO_RX_STOP_ON_BRE: reception is not stopped. 
00078                                               CEC_RX_STOP_ON_BRE:    reception is stopped. */
00079 
00080   uint32_t BREErrorBitGen;               /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the
00081                                               CEC line upon Bit Rising Error detection.
00082                                               CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation.
00083                                               CEC_BRE_ERRORBIT_GENERATION:    error-bit generation if BRESTP is set. */
00084                                               
00085   uint32_t LBPEErrorBitGen;              /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the
00086                                               CEC line upon Long Bit Period Error detection.
00087                                               CEC_LBPE_ERRORBIT_NO_GENERATION:  no error-bit generation. 
00088                                               CEC_LBPE_ERRORBIT_GENERATION:     error-bit generation. */  
00089                                               
00090   uint32_t BroadcastMsgNoErrorBitGen;    /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line
00091                                               upon an error detected on a broadcast message. 
00092                                               
00093                                               It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
00094                                               
00095                                               1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
00096                                                  a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE 
00097                                                     and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
00098                                                  b) LBPE detection: error-bit generation on the CEC line 
00099                                                     if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
00100                                                     
00101                                               2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
00102                                                  no error-bit generation in case neither a) nor b) are satisfied. Additionally,
00103                                                  there is no error-bit generation in case of Short Bit Period Error detection in 
00104                                                  a broadcast message while LSTN bit is set. */
00105  
00106   uint32_t SignalFreeTimeOption;         /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts.
00107                                               CEC_SFT_START_ON_TXSOM SFT:    timer starts when TXSOM is set by software.
00108                                               CEC_SFT_START_ON_TX_RX_END:  SFT timer starts automatically at the end of message transmission/reception. */
00109   
00110   uint32_t ListenMode;                   /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values:
00111   
00112                                               CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its 
00113                                                 own address (OAR). Messages addressed to different destination are ignored. 
00114                                                 Broadcast messages are always received.
00115                                                 
00116                                               CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own 
00117                                                 address (OAR) with positive acknowledge. Messages addressed to different destination 
00118                                                 are received, but without interfering with the CEC bus: no acknowledge sent.  */
00119 
00120   uint16_t  OwnAddress;                 /*!< Own addresses configuration
00121                                              This parameter can be a value of @ref CEC_OWN_ADDRESS */
00122   
00123   uint8_t  *RxBuffer;                    /*!< CEC Rx buffer pointeur */
00124   
00125 
00126 }CEC_InitTypeDef;
00127 
00128 /** 
00129   * @brief HAL CEC State structures definition 
00130   * @note  HAL CEC State value is a combination of 2 different substates: gState and RxState.
00131   *        - gState contains CEC state information related to global Handle management 
00132   *          and also information related to Tx operations.
00133   *          gState value coding follow below described bitmap :
00134   *          b7 (not used)
00135   *             x  : Should be set to 0
00136   *          b6  Error information 
00137   *             0  : No Error
00138   *             1  : Error
00139   *          b5     IP initilisation status
00140   *             0  : Reset (IP not initialized)
00141   *             1  : Init done (IP initialized. HAL CEC Init function already called)
00142   *          b4-b3  (not used)
00143   *             xx : Should be set to 00
00144   *          b2     Intrinsic process state
00145   *             0  : Ready
00146   *             1  : Busy (IP busy with some configuration or internal operations)
00147   *          b1     (not used)
00148   *             x  : Should be set to 0
00149   *          b0     Tx state
00150   *             0  : Ready (no Tx operation ongoing)
00151   *             1  : Busy (Tx operation ongoing)
00152   *        - RxState contains information related to Rx operations.
00153   *          RxState value coding follow below described bitmap :
00154   *          b7-b6  (not used)
00155   *             xx : Should be set to 00
00156   *          b5     IP initilisation status
00157   *             0  : Reset (IP not initialized)
00158   *             1  : Init done (IP initialized)
00159   *          b4-b2  (not used)
00160   *            xxx : Should be set to 000
00161   *          b1     Rx state
00162   *             0  : Ready (no Rx operation ongoing)
00163   *             1  : Busy (Rx operation ongoing)
00164   *          b0     (not used)
00165   *             x  : Should be set to 0.  
00166   */ 
00167 typedef enum
00168 {
00169   HAL_CEC_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized 
00170                                                    Value is allowed for gState and RxState             */
00171   HAL_CEC_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
00172                                                    Value is allowed for gState and RxState             */
00173   HAL_CEC_STATE_BUSY              = 0x24U,    /*!< an internal process is ongoing
00174                                                    Value is allowed for gState only                    */
00175   HAL_CEC_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
00176                                                    Value is allowed for RxState only                   */
00177   HAL_CEC_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing 
00178                                                    Value is allowed for gState only                    */
00179   HAL_CEC_STATE_ERROR             = 0x60U     /*!< Error Value is allowed for gState only              */
00180 }HAL_CEC_StateTypeDef;
00181 
00182 /** 
00183   * @brief  CEC handle Structure definition  
00184   */  
00185 typedef struct
00186 {
00187   CEC_TypeDef             *Instance;      /*!< CEC registers base address */
00188   
00189   CEC_InitTypeDef         Init;           /*!< CEC communication parameters */
00190   
00191   uint8_t                 *pTxBuffPtr;    /*!< Pointer to CEC Tx transfer Buffer */
00192   
00193   uint16_t                TxXferCount;    /*!< CEC Tx Transfer Counter */
00194   
00195   uint16_t                RxXferSize;     /*!< CEC Rx Transfer size, 0: header received only */
00196   
00197   HAL_LockTypeDef         Lock;           /*!< Locking object */
00198 
00199   HAL_CEC_StateTypeDef    gState;         /*!< CEC state information related to global Handle management 
00200                                                and also related to Tx operations.
00201                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
00202   
00203   HAL_CEC_StateTypeDef    RxState;        /*!< CEC state information related to Rx operations.
00204                                                This parameter can be a value of @ref HAL_CEC_StateTypeDef */
00205   
00206   uint32_t                ErrorCode;      /*!< For errors handling purposes, copy of ISR register 
00207                                                in case error is reported */    
00208 }CEC_HandleTypeDef;
00209 /**
00210   * @}
00211   */
00212 
00213 /* Exported constants --------------------------------------------------------*/
00214 /** @defgroup CEC_Exported_Constants CEC Exported Constants
00215   * @{
00216   */
00217 
00218 /** @defgroup CEC_Error_Code CEC Error Code
00219   * @{
00220   */ 
00221 #define HAL_CEC_ERROR_NONE    0x00000000U            /*!< no error                      */
00222 #define HAL_CEC_ERROR_RXOVR   CEC_ISR_RXOVR          /*!< CEC Rx-Overrun                */
00223 #define HAL_CEC_ERROR_BRE     CEC_ISR_BRE            /*!< CEC Rx Bit Rising Error       */
00224 #define HAL_CEC_ERROR_SBPE    CEC_ISR_SBPE           /*!< CEC Rx Short Bit period Error */
00225 #define HAL_CEC_ERROR_LBPE    CEC_ISR_LBPE           /*!< CEC Rx Long Bit period Error  */
00226 #define HAL_CEC_ERROR_RXACKE  CEC_ISR_RXACKE         /*!< CEC Rx Missing Acknowledge    */
00227 #define HAL_CEC_ERROR_ARBLST  CEC_ISR_ARBLST         /*!< CEC Arbitration Lost          */
00228 #define HAL_CEC_ERROR_TXUDR   CEC_ISR_TXUDR          /*!< CEC Tx-Buffer Underrun        */
00229 #define HAL_CEC_ERROR_TXERR   CEC_ISR_TXERR          /*!< CEC Tx-Error                  */
00230 #define HAL_CEC_ERROR_TXACKE  CEC_ISR_TXACKE         /*!< CEC Tx Missing Acknowledge    */
00231 /**
00232   * @}
00233   */
00234        
00235 /** @defgroup CEC_Signal_Free_Time  CEC Signal Free Time setting parameter
00236   * @{
00237   */
00238 #define CEC_DEFAULT_SFT                    0x00000000U
00239 #define CEC_0_5_BITPERIOD_SFT              0x00000001U
00240 #define CEC_1_5_BITPERIOD_SFT              0x00000002U
00241 #define CEC_2_5_BITPERIOD_SFT              0x00000003U
00242 #define CEC_3_5_BITPERIOD_SFT              0x00000004U
00243 #define CEC_4_5_BITPERIOD_SFT              0x00000005U
00244 #define CEC_5_5_BITPERIOD_SFT              0x00000006U
00245 #define CEC_6_5_BITPERIOD_SFT              0x00000007U
00246 /**
00247   * @}
00248   */
00249 
00250 /** @defgroup CEC_Tolerance CEC Receiver Tolerance
00251   * @{
00252   */
00253 #define CEC_STANDARD_TOLERANCE             0x00000000U
00254 #define CEC_EXTENDED_TOLERANCE             ((uint32_t)CEC_CFGR_RXTOL)
00255 /**
00256   * @}
00257   */ 
00258 
00259 /** @defgroup CEC_BRERxStop CEC Reception Stop on Error
00260   * @{
00261   */
00262 #define CEC_NO_RX_STOP_ON_BRE             0x00000000U
00263 #define CEC_RX_STOP_ON_BRE                ((uint32_t)CEC_CFGR_BRESTP)
00264 /**
00265   * @}
00266   */            
00267              
00268 /** @defgroup CEC_BREErrorBitGen  CEC Error Bit Generation if Bit Rise Error reported
00269   * @{
00270   */ 
00271 #define CEC_BRE_ERRORBIT_NO_GENERATION     0x00000000U
00272 #define CEC_BRE_ERRORBIT_GENERATION        ((uint32_t)CEC_CFGR_BREGEN)
00273 /**
00274   * @}
00275   */ 
00276                         
00277 /** @defgroup CEC_LBPEErrorBitGen  CEC Error Bit Generation if Long Bit Period Error reported
00278   * @{
00279   */ 
00280 #define CEC_LBPE_ERRORBIT_NO_GENERATION     0x00000000U
00281 #define CEC_LBPE_ERRORBIT_GENERATION        ((uint32_t)CEC_CFGR_LBPEGEN)
00282 /**
00283   * @}
00284   */    
00285 
00286 /** @defgroup CEC_BroadCastMsgErrorBitGen  CEC Error Bit Generation on Broadcast message
00287   * @{
00288   */ 
00289 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION     0x00000000U
00290 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION  ((uint32_t)CEC_CFGR_BRDNOGEN)
00291 /**
00292   * @}
00293   */
00294   
00295 /** @defgroup CEC_SFT_Option     CEC Signal Free Time start option
00296   * @{
00297   */ 
00298 #define CEC_SFT_START_ON_TXSOM           0x00000000U
00299 #define CEC_SFT_START_ON_TX_RX_END       ((uint32_t)CEC_CFGR_SFTOPT)
00300 /**
00301   * @}
00302   */
00303   
00304 /** @defgroup CEC_Listening_Mode    CEC Listening mode option
00305   * @{
00306   */ 
00307 #define CEC_REDUCED_LISTENING_MODE          0x00000000U
00308 #define CEC_FULL_LISTENING_MODE             ((uint32_t)CEC_CFGR_LSTN)
00309 /**
00310   * @}
00311   */
00312   
00313 /** @defgroup CEC_OAR_Position   CEC Device Own Address position in CEC CFGR register     
00314   * @{
00315   */
00316 #define CEC_CFGR_OAR_LSB_POS            16U
00317 /**
00318   * @}
00319   */
00320   
00321 /** @defgroup CEC_Initiator_Position   CEC Initiator logical address position in message header     
00322   * @{
00323   */
00324 #define CEC_INITIATOR_LSB_POS           4U
00325 /**
00326   * @}
00327   */
00328 
00329 /** @defgroup CEC_OWN_ADDRESS   CEC Own Address    
00330   * @{
00331   */
00332 #define CEC_OWN_ADDRESS_NONE           ((uint16_t)0x0000)   /* Reset value */
00333 #define CEC_OWN_ADDRESS_0              ((uint16_t)0x0001)   /* Logical Address 0 */
00334 #define CEC_OWN_ADDRESS_1              ((uint16_t)0x0002)   /* Logical Address 1 */
00335 #define CEC_OWN_ADDRESS_2              ((uint16_t)0x0004)   /* Logical Address 2 */
00336 #define CEC_OWN_ADDRESS_3              ((uint16_t)0x0008)   /* Logical Address 3 */
00337 #define CEC_OWN_ADDRESS_4              ((uint16_t)0x0010)   /* Logical Address 4 */
00338 #define CEC_OWN_ADDRESS_5              ((uint16_t)0x0020)   /* Logical Address 5 */
00339 #define CEC_OWN_ADDRESS_6              ((uint16_t)0x0040)   /* Logical Address 6 */
00340 #define CEC_OWN_ADDRESS_7              ((uint16_t)0x0080)   /* Logical Address 7 */
00341 #define CEC_OWN_ADDRESS_8              ((uint16_t)0x0100)   /* Logical Address 9 */
00342 #define CEC_OWN_ADDRESS_9              ((uint16_t)0x0200)   /* Logical Address 10 */
00343 #define CEC_OWN_ADDRESS_10             ((uint16_t)0x0400)   /* Logical Address 11 */
00344 #define CEC_OWN_ADDRESS_11             ((uint16_t)0x0800)   /* Logical Address 12 */
00345 #define CEC_OWN_ADDRESS_12             ((uint16_t)0x1000)   /* Logical Address 13 */
00346 #define CEC_OWN_ADDRESS_13             ((uint16_t)0x2000)   /* Logical Address 14 */
00347 #define CEC_OWN_ADDRESS_14             ((uint16_t)0x4000)   /* Logical Address 15 */
00348 /**
00349   * @}
00350   */
00351     
00352 /** @defgroup CEC_Interrupts_Definitions  CEC Interrupts definition
00353   * @{
00354   */
00355 #define CEC_IT_TXACKE                   CEC_IER_TXACKEIE
00356 #define CEC_IT_TXERR                    CEC_IER_TXERRIE
00357 #define CEC_IT_TXUDR                    CEC_IER_TXUDRIE
00358 #define CEC_IT_TXEND                    CEC_IER_TXENDIE
00359 #define CEC_IT_TXBR                     CEC_IER_TXBRIE
00360 #define CEC_IT_ARBLST                   CEC_IER_ARBLSTIE
00361 #define CEC_IT_RXACKE                   CEC_IER_RXACKEIE
00362 #define CEC_IT_LBPE                     CEC_IER_LBPEIE
00363 #define CEC_IT_SBPE                     CEC_IER_SBPEIE
00364 #define CEC_IT_BRE                      CEC_IER_BREIE
00365 #define CEC_IT_RXOVR                    CEC_IER_RXOVRIE
00366 #define CEC_IT_RXEND                    CEC_IER_RXENDIE
00367 #define CEC_IT_RXBR                     CEC_IER_RXBRIE
00368 /**
00369   * @}
00370   */
00371 
00372 /** @defgroup CEC_Flags_Definitions  CEC Flags definition
00373   * @{
00374   */
00375 #define CEC_FLAG_TXACKE                 CEC_ISR_TXACKE
00376 #define CEC_FLAG_TXERR                  CEC_ISR_TXERR
00377 #define CEC_FLAG_TXUDR                  CEC_ISR_TXUDR
00378 #define CEC_FLAG_TXEND                  CEC_ISR_TXEND
00379 #define CEC_FLAG_TXBR                   CEC_ISR_TXBR
00380 #define CEC_FLAG_ARBLST                 CEC_ISR_ARBLST
00381 #define CEC_FLAG_RXACKE                 CEC_ISR_RXACKE
00382 #define CEC_FLAG_LBPE                   CEC_ISR_LBPE
00383 #define CEC_FLAG_SBPE                   CEC_ISR_SBPE
00384 #define CEC_FLAG_BRE                    CEC_ISR_BRE
00385 #define CEC_FLAG_RXOVR                  CEC_ISR_RXOVR
00386 #define CEC_FLAG_RXEND                  CEC_ISR_RXEND
00387 #define CEC_FLAG_RXBR                   CEC_ISR_RXBR
00388 /**
00389   * @}
00390   */
00391   
00392 /** @defgroup CEC_ALL_ERROR CEC all RX or TX errors flags 
00393   * @{
00394   */
00395 #define CEC_ISR_ALL_ERROR              ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
00396                                                   CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
00397 /**
00398   * @}
00399   */
00400 
00401 /** @defgroup CEC_IER_ALL_RX CEC all RX errors interrupts enabling flag 
00402   * @{
00403   */
00404 #define CEC_IER_RX_ALL_ERR              ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
00405 /**
00406   * @}
00407   */
00408   
00409 /** @defgroup CEC_IER_ALL_TX CEC all TX errors interrupts enabling flag 
00410   * @{
00411   */
00412 #define CEC_IER_TX_ALL_ERR              ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
00413 /**
00414   * @}
00415   */
00416   
00417 /**
00418   * @}
00419   */  
00420   
00421 /* Exported macros -----------------------------------------------------------*/
00422 /** @defgroup CEC_Exported_Macros CEC Exported Macros
00423   * @{
00424   */
00425 
00426 /** @brief  Reset CEC handle gstate & RxState
00427   * @param  __HANDLE__ CEC handle.
00428   * @retval None
00429   */
00430 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
00431                                                        (__HANDLE__)->gState = HAL_CEC_STATE_RESET;     \
00432                                                        (__HANDLE__)->RxState = HAL_CEC_STATE_RESET;    \
00433                                                      } while(0)
00434 
00435 /** @brief  Checks whether or not the specified CEC interrupt flag is set.
00436   * @param  __HANDLE__ specifies the CEC Handle.
00437   * @param  __FLAG__ specifies the flag to check.
00438   *            @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
00439   *            @arg CEC_FLAG_TXERR: Tx Error.
00440   *            @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
00441   *            @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
00442   *            @arg CEC_FLAG_TXBR: Tx-Byte Request.
00443   *            @arg CEC_FLAG_ARBLST: Arbitration Lost
00444   *            @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge 
00445   *            @arg CEC_FLAG_LBPE: Rx Long period Error
00446   *            @arg CEC_FLAG_SBPE: Rx Short period Error
00447   *            @arg CEC_FLAG_BRE: Rx Bit Rising Error
00448   *            @arg CEC_FLAG_RXOVR: Rx Overrun.
00449   *            @arg CEC_FLAG_RXEND: End Of Reception.
00450   *            @arg CEC_FLAG_RXBR: Rx-Byte Received.      
00451   * @retval ITStatus
00452   */
00453 #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__)        ((__HANDLE__)->Instance->ISR & (__FLAG__)) 
00454 
00455 /** @brief  Clears the interrupt or status flag when raised (write at 1)
00456   * @param  __HANDLE__ specifies the CEC Handle.
00457   * @param  __FLAG__ specifies the interrupt/status flag to clear.
00458   *        This parameter can be one of the following values:
00459   *            @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
00460   *            @arg CEC_FLAG_TXERR: Tx Error.
00461   *            @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
00462   *            @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte).
00463   *            @arg CEC_FLAG_TXBR: Tx-Byte Request.
00464   *            @arg CEC_FLAG_ARBLST: Arbitration Lost
00465   *            @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge 
00466   *            @arg CEC_FLAG_LBPE: Rx Long period Error
00467   *            @arg CEC_FLAG_SBPE: Rx Short period Error
00468   *            @arg CEC_FLAG_BRE: Rx Bit Rising Error
00469   *            @arg CEC_FLAG_RXOVR: Rx Overrun.
00470   *            @arg CEC_FLAG_RXEND: End Of Reception.
00471   *            @arg CEC_FLAG_RXBR: Rx-Byte Received. 
00472   * @retval none  
00473   */
00474 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__)         ((__HANDLE__)->Instance->ISR |= (__FLAG__)) 
00475 
00476 /** @brief  Enables the specified CEC interrupt.
00477   * @param  __HANDLE__ specifies the CEC Handle.
00478   * @param  __INTERRUPT__ specifies the CEC interrupt to enable.
00479   *          This parameter can be one of the following values:
00480   *            @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 
00481   *            @arg CEC_IT_TXERR: Tx Error IT Enable 
00482   *            @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 
00483   *            @arg CEC_IT_TXEND: End of transmission IT Enable 
00484   *            @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 
00485   *            @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 
00486   *            @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 
00487   *            @arg CEC_IT_LBPE: Rx Long period Error IT Enable 
00488   *            @arg CEC_IT_SBPE: Rx Short period Error IT Enable 
00489   *            @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 
00490   *            @arg CEC_IT_RXOVR: Rx Overrun IT Enable 
00491   *            @arg CEC_IT_RXEND: End Of Reception IT Enable 
00492   *            @arg CEC_IT_RXBR: Rx-Byte Received IT Enable                          
00493   * @retval none
00494   */
00495 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__)     ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))  
00496 
00497 /** @brief  Disables the specified CEC interrupt.
00498   * @param  __HANDLE__ specifies the CEC Handle.
00499   * @param  __INTERRUPT__ specifies the CEC interrupt to disable.
00500   *          This parameter can be one of the following values:
00501   *            @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 
00502   *            @arg CEC_IT_TXERR: Tx Error IT Enable 
00503   *            @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 
00504   *            @arg CEC_IT_TXEND: End of transmission IT Enable 
00505   *            @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 
00506   *            @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 
00507   *            @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 
00508   *            @arg CEC_IT_LBPE: Rx Long period Error IT Enable 
00509   *            @arg CEC_IT_SBPE: Rx Short period Error IT Enable 
00510   *            @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 
00511   *            @arg CEC_IT_RXOVR: Rx Overrun IT Enable 
00512   *            @arg CEC_IT_RXEND: End Of Reception IT Enable 
00513   *            @arg CEC_IT_RXBR: Rx-Byte Received IT Enable                   
00514   * @retval none
00515   */   
00516 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))  
00517 
00518 /** @brief  Checks whether or not the specified CEC interrupt is enabled.
00519   * @param  __HANDLE__ specifies the CEC Handle.
00520   * @param  __INTERRUPT__ specifies the CEC interrupt to check.
00521   *          This parameter can be one of the following values:
00522   *            @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 
00523   *            @arg CEC_IT_TXERR: Tx Error IT Enable 
00524   *            @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 
00525   *            @arg CEC_IT_TXEND: End of transmission IT Enable 
00526   *            @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 
00527   *            @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 
00528   *            @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 
00529   *            @arg CEC_IT_LBPE: Rx Long period Error IT Enable 
00530   *            @arg CEC_IT_SBPE: Rx Short period Error IT Enable 
00531   *            @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 
00532   *            @arg CEC_IT_RXOVR: Rx Overrun IT Enable 
00533   *            @arg CEC_IT_RXEND: End Of Reception IT Enable 
00534   *            @arg CEC_IT_RXBR: Rx-Byte Received IT Enable                  
00535   * @retval FlagStatus  
00536   */
00537 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
00538 
00539 /** @brief  Enables the CEC device
00540   * @param  __HANDLE__ specifies the CEC Handle.               
00541   * @retval none 
00542   */
00543 #define __HAL_CEC_ENABLE(__HANDLE__)                   ((__HANDLE__)->Instance->CR |=  CEC_CR_CECEN)
00544 
00545 /** @brief  Disables the CEC device
00546   * @param  __HANDLE__ specifies the CEC Handle.               
00547   * @retval none 
00548   */
00549 #define __HAL_CEC_DISABLE(__HANDLE__)                  ((__HANDLE__)->Instance->CR &=  ~CEC_CR_CECEN)
00550 
00551 /** @brief  Set Transmission Start flag
00552   * @param  __HANDLE__ specifies the CEC Handle.               
00553   * @retval none 
00554   */
00555 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__)        ((__HANDLE__)->Instance->CR |=  CEC_CR_TXSOM)
00556 
00557 /** @brief  Set Transmission End flag
00558   * @param  __HANDLE__ specifies the CEC Handle.               
00559   * @retval none 
00560   * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.  
00561   */
00562 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__)         ((__HANDLE__)->Instance->CR |=  CEC_CR_TXEOM)
00563 
00564 /** @brief  Get Transmission Start flag
00565   * @param  __HANDLE__ specifies the CEC Handle.               
00566   * @retval FlagStatus 
00567   */
00568 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
00569 
00570 /** @brief  Get Transmission End flag
00571   * @param  __HANDLE__ specifies the CEC Handle.               
00572   * @retval FlagStatus 
00573   */
00574 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__)   ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)   
00575 
00576 /** @brief  Clear OAR register
00577   * @param  __HANDLE__ specifies the CEC Handle.               
00578   * @retval none 
00579   */
00580 #define __HAL_CEC_CLEAR_OAR(__HANDLE__)   CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
00581 
00582 /** @brief  Set OAR register (without resetting previously set address in case of multi-address mode)
00583   *          To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
00584   * @param  __HANDLE__ specifies the CEC Handle. 
00585   * @param  __ADDRESS__ Own Address value (CEC logical address is identified by bit position)                   
00586   * @retval none 
00587   */
00588 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__)   SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
00589 
00590 /**
00591   * @}
00592   */                       
00593 
00594 /* Exported functions --------------------------------------------------------*/
00595 /** @addtogroup CEC_Exported_Functions
00596   * @{
00597   */
00598 
00599 /** @addtogroup CEC_Exported_Functions_Group1
00600   * @{
00601   */
00602 /* Initialization and de-initialization functions  ****************************/
00603 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
00604 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
00605 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
00606 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
00607 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
00608 /**
00609   * @}
00610   */
00611 
00612 /** @addtogroup CEC_Exported_Functions_Group2
00613   * @{
00614   */
00615 /* I/O operation functions  ***************************************************/
00616 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
00617 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec);
00618 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer);
00619 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
00620 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
00621 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
00622 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
00623 /**
00624   * @}
00625   */
00626 
00627 /** @addtogroup CEC_Exported_Functions_Group3
00628   * @{
00629   */
00630 /* Peripheral State functions  ************************************************/
00631 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
00632 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
00633 /**
00634   * @}
00635   */
00636 
00637 /**
00638   * @}
00639   */
00640   
00641 /* Private types -------------------------------------------------------------*/
00642 /** @defgroup CEC_Private_Types CEC Private Types
00643   * @{
00644   */
00645 
00646 /**
00647   * @}
00648   */ 
00649 
00650 /* Private variables ---------------------------------------------------------*/
00651 /** @defgroup CEC_Private_Variables CEC Private Variables
00652   * @{
00653   */
00654   
00655 /**
00656   * @}
00657   */ 
00658 
00659 /* Private constants ---------------------------------------------------------*/
00660 /** @defgroup CEC_Private_Constants CEC Private Constants
00661   * @{
00662   */
00663 
00664 /**
00665   * @}
00666   */ 
00667 
00668 /* Private macros ------------------------------------------------------------*/
00669 /** @defgroup CEC_Private_Macros CEC Private Macros
00670   * @{
00671   */
00672   
00673 #define IS_CEC_SIGNALFREETIME(__SFT__)     ((__SFT__) <= CEC_CFGR_SFT)  
00674 
00675 #define IS_CEC_TOLERANCE(__RXTOL__)        (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
00676                                             ((__RXTOL__) == CEC_EXTENDED_TOLERANCE))
00677 
00678 #define IS_CEC_BRERXSTOP(__BRERXSTOP__)   (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
00679                                            ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))
00680 
00681 #define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
00682                                                 ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))
00683 
00684 #define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
00685                                                  ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))
00686 
00687 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
00688                                                                        ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
00689 
00690 #define IS_CEC_SFTOP(__SFTOP__)          (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
00691                                           ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))
00692 
00693 #define IS_CEC_LISTENING_MODE(__MODE__)     (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
00694                                              ((__MODE__) == CEC_FULL_LISTENING_MODE))
00695 
00696 /** @brief Check CEC message size.
00697   *       The message size is the payload size: without counting the header, 
00698   *       it varies from 0 byte (ping operation, one header only, no payload) to 
00699   *       15 bytes (1 opcode and up to 14 operands following the header). 
00700   * @param  __SIZE__ CEC message size.               
00701   * @retval Test result (TRUE or FALSE).
00702   */
00703 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U)  
00704                                                  
00705 /** @brief Check CEC device Own Address Register (OAR) setting.
00706   *        OAR address is written in a 15-bit field within CEC_CFGR register. 
00707   * @param  __ADDRESS__ CEC own address.               
00708   * @retval Test result (TRUE or FALSE).
00709   */
00710 #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFFU)
00711 
00712 /** @brief Check CEC initiator or destination logical address setting.
00713   *        Initiator and destination addresses are coded over 4 bits. 
00714   * @param  __ADDRESS__ CEC initiator or logical address.               
00715   * @retval Test result (TRUE or FALSE).
00716   */
00717 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0FU) 
00718 /**
00719   * @}
00720   */
00721 /* Private functions ---------------------------------------------------------*/
00722 /** @defgroup CEC_Private_Functions CEC Private Functions
00723   * @{
00724   */
00725   
00726 /**
00727   * @}
00728   */
00729   
00730 /**
00731   * @}
00732   */ 
00733 
00734 /**
00735   * @}
00736   */ 
00737 #endif /* STM32F446xx */
00738   
00739 #ifdef __cplusplus
00740 }
00741 #endif
00742 
00743 #endif /* __STM32F4xx_HAL_CEC_H */
00744 
00745 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/