STM32F439xx HAL User Manual
stm32f4xx_hal.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal.h
00004   * @author  MCD Application Team
00005   * @brief   This file contains all the functions prototypes for the HAL 
00006   *          module driver.
00007   ******************************************************************************
00008   * @attention
00009   *
00010   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00011   *
00012   * Redistribution and use in source and binary forms, with or without modification,
00013   * are permitted provided that the following conditions are met:
00014   *   1. Redistributions of source code must retain the above copyright notice,
00015   *      this list of conditions and the following disclaimer.
00016   *   2. Redistributions in binary form must reproduce the above copyright notice,
00017   *      this list of conditions and the following disclaimer in the documentation
00018   *      and/or other materials provided with the distribution.
00019   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00020   *      may be used to endorse or promote products derived from this software
00021   *      without specific prior written permission.
00022   *
00023   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00024   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00025   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00026   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00027   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00028   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00029   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00030   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00031   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00032   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00033   *
00034   ******************************************************************************
00035   */ 
00036 
00037 /* Define to prevent recursive inclusion -------------------------------------*/
00038 #ifndef __STM32F4xx_HAL_H
00039 #define __STM32F4xx_HAL_H
00040 
00041 #ifdef __cplusplus
00042  extern "C" {
00043 #endif
00044 
00045 /* Includes ------------------------------------------------------------------*/
00046 #include "stm32f4xx_hal_conf.h"
00047 
00048 /** @addtogroup STM32F4xx_HAL_Driver
00049   * @{
00050   */
00051 
00052 /** @addtogroup HAL
00053   * @{
00054   */ 
00055 
00056 /* Exported types ------------------------------------------------------------*/
00057 /* Exported constants --------------------------------------------------------*/
00058 
00059 /** @defgroup HAL_Exported_Constants HAL Exported Constants
00060   * @{
00061   */
00062 
00063 /** @defgroup HAL_TICK_FREQ Tick Frequency
00064   * @{
00065   */
00066 typedef enum
00067 {
00068   HAL_TICK_FREQ_10HZ         = 100U,
00069   HAL_TICK_FREQ_100HZ        = 10U,
00070   HAL_TICK_FREQ_1KHZ         = 1U,
00071   HAL_TICK_FREQ_DEFAULT      = HAL_TICK_FREQ_1KHZ
00072 } HAL_TickFreqTypeDef;
00073 /**
00074   * @}
00075   */
00076 
00077 /**
00078   * @}
00079   */
00080    
00081 /* Exported macro ------------------------------------------------------------*/
00082 /** @defgroup HAL_Exported_Macros HAL Exported Macros
00083   * @{
00084   */
00085 
00086 /** @brief  Freeze/Unfreeze Peripherals in Debug mode 
00087   */
00088 #define __HAL_DBGMCU_FREEZE_TIM2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
00089 #define __HAL_DBGMCU_FREEZE_TIM3()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
00090 #define __HAL_DBGMCU_FREEZE_TIM4()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
00091 #define __HAL_DBGMCU_FREEZE_TIM5()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
00092 #define __HAL_DBGMCU_FREEZE_TIM6()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
00093 #define __HAL_DBGMCU_FREEZE_TIM7()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
00094 #define __HAL_DBGMCU_FREEZE_TIM12()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
00095 #define __HAL_DBGMCU_FREEZE_TIM13()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
00096 #define __HAL_DBGMCU_FREEZE_TIM14()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
00097 #define __HAL_DBGMCU_FREEZE_RTC()            (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
00098 #define __HAL_DBGMCU_FREEZE_WWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
00099 #define __HAL_DBGMCU_FREEZE_IWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
00100 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
00101 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
00102 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
00103 #define __HAL_DBGMCU_FREEZE_CAN1()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
00104 #define __HAL_DBGMCU_FREEZE_CAN2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
00105 #define __HAL_DBGMCU_FREEZE_TIM1()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
00106 #define __HAL_DBGMCU_FREEZE_TIM8()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
00107 #define __HAL_DBGMCU_FREEZE_TIM9()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
00108 #define __HAL_DBGMCU_FREEZE_TIM10()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
00109 #define __HAL_DBGMCU_FREEZE_TIM11()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
00110 
00111 #define __HAL_DBGMCU_UNFREEZE_TIM2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
00112 #define __HAL_DBGMCU_UNFREEZE_TIM3()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
00113 #define __HAL_DBGMCU_UNFREEZE_TIM4()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
00114 #define __HAL_DBGMCU_UNFREEZE_TIM5()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
00115 #define __HAL_DBGMCU_UNFREEZE_TIM6()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
00116 #define __HAL_DBGMCU_UNFREEZE_TIM7()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
00117 #define __HAL_DBGMCU_UNFREEZE_TIM12()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
00118 #define __HAL_DBGMCU_UNFREEZE_TIM13()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
00119 #define __HAL_DBGMCU_UNFREEZE_TIM14()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
00120 #define __HAL_DBGMCU_UNFREEZE_RTC()            (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
00121 #define __HAL_DBGMCU_UNFREEZE_WWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
00122 #define __HAL_DBGMCU_UNFREEZE_IWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
00123 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
00124 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
00125 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
00126 #define __HAL_DBGMCU_UNFREEZE_CAN1()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
00127 #define __HAL_DBGMCU_UNFREEZE_CAN2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
00128 #define __HAL_DBGMCU_UNFREEZE_TIM1()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
00129 #define __HAL_DBGMCU_UNFREEZE_TIM8()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
00130 #define __HAL_DBGMCU_UNFREEZE_TIM9()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
00131 #define __HAL_DBGMCU_UNFREEZE_TIM10()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
00132 #define __HAL_DBGMCU_UNFREEZE_TIM11()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
00133 
00134 /** @brief  Main Flash memory mapped at 0x00000000
00135   */
00136 #define __HAL_SYSCFG_REMAPMEMORY_FLASH()             (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
00137 
00138 /** @brief  System Flash memory mapped at 0x00000000
00139   */
00140 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
00141                                                          SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
00142                                                         }while(0);
00143 
00144 /** @brief  Embedded SRAM mapped at 0x00000000
00145   */
00146 #define __HAL_SYSCFG_REMAPMEMORY_SRAM()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
00147                                                   SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
00148                                                  }while(0);
00149 
00150 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
00151 /** @brief  FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
00152   */
00153 #define __HAL_SYSCFG_REMAPMEMORY_FSMC()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
00154                                                   SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
00155                                                  }while(0);
00156 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
00157 
00158 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
00159     defined(STM32F469xx) || defined(STM32F479xx)
00160 /** @brief  FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
00161   */
00162 #define __HAL_SYSCFG_REMAPMEMORY_FMC()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
00163                                                  SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
00164                                                 }while(0);
00165 
00166 /** @brief  FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
00167   */
00168 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
00169                                                        SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
00170                                                       }while(0);
00171 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 
00172 
00173 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
00174 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
00175   * @{
00176   */
00177 /** @brief  SYSCFG Break Lockup lock
00178   *         Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
00179   * @note   The selected configuration is locked and can be unlocked by system reset
00180   */
00181 #define __HAL_SYSCFG_BREAK_PVD_LOCK()      do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
00182                                                SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK;    \
00183                                               }while(0)
00184 /**
00185  * @}
00186  */
00187 
00188 /** @defgroup PVD_Lock_Enable PVD Lock
00189   * @{
00190   */
00191 /** @brief  SYSCFG Break PVD lock
00192   *         Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
00193   * @note   The selected configuration is locked and can be unlocked by system reset
00194   */
00195 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK()     do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
00196                                                  SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK;    \
00197                                                 }while(0)
00198 /**
00199  * @}
00200  */
00201 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
00202 /**
00203   * @}
00204   */
00205 
00206 /** @defgroup HAL_Private_Macros HAL Private Macros
00207   * @{
00208   */
00209 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ)  || \
00210                            ((FREQ) == HAL_TICK_FREQ_100HZ) || \
00211                            ((FREQ) == HAL_TICK_FREQ_1KHZ))
00212 /**
00213   * @}
00214   */
00215 
00216 /* Exported functions --------------------------------------------------------*/
00217 /** @addtogroup HAL_Exported_Functions
00218   * @{
00219   */
00220 /** @addtogroup HAL_Exported_Functions_Group1
00221   * @{
00222   */
00223 /* Initialization and Configuration functions  ******************************/
00224 HAL_StatusTypeDef HAL_Init(void);
00225 HAL_StatusTypeDef HAL_DeInit(void);
00226 void HAL_MspInit(void);
00227 void HAL_MspDeInit(void);
00228 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
00229 /**
00230   * @}
00231   */
00232 
00233 /** @addtogroup HAL_Exported_Functions_Group2
00234   * @{
00235   */
00236 /* Peripheral Control functions  ************************************************/
00237 void HAL_IncTick(void);
00238 void HAL_Delay(uint32_t Delay);
00239 uint32_t HAL_GetTick(void);
00240 uint32_t HAL_GetTickPrio(void);
00241 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
00242 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
00243 void HAL_SuspendTick(void);
00244 void HAL_ResumeTick(void);
00245 uint32_t HAL_GetHalVersion(void);
00246 uint32_t HAL_GetREVID(void);
00247 uint32_t HAL_GetDEVID(void);
00248 void HAL_DBGMCU_EnableDBGSleepMode(void);
00249 void HAL_DBGMCU_DisableDBGSleepMode(void);
00250 void HAL_DBGMCU_EnableDBGStopMode(void);
00251 void HAL_DBGMCU_DisableDBGStopMode(void);
00252 void HAL_DBGMCU_EnableDBGStandbyMode(void);
00253 void HAL_DBGMCU_DisableDBGStandbyMode(void);
00254 void HAL_EnableCompensationCell(void);
00255 void HAL_DisableCompensationCell(void);
00256 void HAL_GetUID(uint32_t *UID);
00257 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
00258     defined(STM32F469xx) || defined(STM32F479xx)
00259 void HAL_EnableMemorySwappingBank(void);
00260 void HAL_DisableMemorySwappingBank(void);
00261 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 
00262 /**
00263   * @}
00264   */
00265 
00266 /**
00267   * @}
00268   */
00269 /* Private types -------------------------------------------------------------*/
00270 /* Private variables ---------------------------------------------------------*/
00271 /** @defgroup HAL_Private_Variables HAL Private Variables
00272   * @{
00273   */
00274 /**
00275   * @}
00276   */
00277 /* Private constants ---------------------------------------------------------*/
00278 /** @defgroup HAL_Private_Constants HAL Private Constants
00279   * @{
00280   */
00281 /**
00282   * @}
00283   */
00284 /* Private macros ------------------------------------------------------------*/
00285 /* Private functions ---------------------------------------------------------*/
00286 /**
00287   * @}
00288   */
00289 
00290 /**
00291   * @}
00292   */ 
00293   
00294 #ifdef __cplusplus
00295 }
00296 #endif
00297 
00298 #endif /* __STM32F4xx_HAL_H */
00299 
00300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/