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STM32F439xx HAL User Manual
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Defines | |
| #define | LL_TIM_TRGO_RESET 0x00000000U |
| #define | LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 |
| #define | LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 |
| #define | LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) |
| #define | LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 |
| #define | LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) |
| #define | LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1) |
| #define | LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) |
| #define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) |
CC1 capture or a compare match is used as trigger output
Definition at line 732 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 |
Counter Enable signal (CNT_EN) is used as trigger output
Definition at line 730 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 |
OC1REF signal is used as trigger output
Definition at line 733 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) |
OC2REF signal is used as trigger output
Definition at line 734 of file stm32f4xx_ll_tim.h.
Referenced by LL_TIM_HALLSENSOR_Init().
| #define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1) |
OC3REF signal is used as trigger output
Definition at line 735 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) |
OC4REF signal is used as trigger output
Definition at line 736 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_RESET 0x00000000U |
UG bit from the TIMx_EGR register is used as trigger output
Definition at line 729 of file stm32f4xx_ll_tim.h.
| #define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 |
Update event is used as trigger output
Definition at line 731 of file stm32f4xx_ll_tim.h.
1.7.6.1