STM32F439xx HAL User Manual
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Enables or disables the AHB1 peripheral clock. More...
Defines | |
#define | __HAL_RCC_BKPSRAM_CLK_ENABLE() |
#define | __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() |
#define | __HAL_RCC_CRC_CLK_ENABLE() |
#define | __HAL_RCC_GPIOD_CLK_ENABLE() |
#define | __HAL_RCC_GPIOE_CLK_ENABLE() |
#define | __HAL_RCC_GPIOI_CLK_ENABLE() |
#define | __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | __HAL_RCC_GPIOG_CLK_ENABLE() |
#define | __HAL_RCC_GPIOJ_CLK_ENABLE() |
#define | __HAL_RCC_GPIOK_CLK_ENABLE() |
#define | __HAL_RCC_DMA2D_CLK_ENABLE() |
#define | __HAL_RCC_ETHMAC_CLK_ENABLE() |
#define | __HAL_RCC_ETHMACTX_CLK_ENABLE() |
#define | __HAL_RCC_ETHMACRX_CLK_ENABLE() |
#define | __HAL_RCC_ETHMACPTP_CLK_ENABLE() |
#define | __HAL_RCC_USB_OTG_HS_CLK_ENABLE() |
#define | __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() |
#define | __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN)) |
#define | __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN)) |
#define | __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN)) |
#define | __HAL_RCC_GPIOG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN)) |
#define | __HAL_RCC_GPIOI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN)) |
#define | __HAL_RCC_GPIOJ_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOJEN)) |
#define | __HAL_RCC_GPIOK_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOKEN)) |
#define | __HAL_RCC_DMA2D_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2DEN)) |
#define | __HAL_RCC_ETHMAC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN)) |
#define | __HAL_RCC_ETHMACTX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN)) |
#define | __HAL_RCC_ETHMACRX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN)) |
#define | __HAL_RCC_ETHMACPTP_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN)) |
#define | __HAL_RCC_USB_OTG_HS_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN)) |
#define | __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN)) |
#define | __HAL_RCC_BKPSRAM_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN)) |
#define | __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN)) |
#define | __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN)) |
#define | __HAL_RCC_ETH_CLK_ENABLE() |
Enable ETHERNET clock. | |
#define | __HAL_RCC_ETH_CLK_DISABLE() |
Disable ETHERNET clock. |
Enables or disables the AHB1 peripheral clock.
#define __HAL_RCC_BKPSRAM_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN)) |
Definition at line 1121 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_BKPSRAM_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 988 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN)) |
Definition at line 1122 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 995 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CRC_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN)) |
Definition at line 1123 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CRC_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1002 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_DMA2D_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2DEN)) |
Definition at line 1114 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_DMA2D_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1058 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETH_CLK_DISABLE | ( | ) |
do { \ __HAL_RCC_ETHMACTX_CLK_DISABLE(); \ __HAL_RCC_ETHMACRX_CLK_DISABLE(); \ __HAL_RCC_ETHMAC_CLK_DISABLE(); \ } while(0U)
Disable ETHERNET clock.
Definition at line 1136 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETH_CLK_ENABLE | ( | ) |
do { \ __HAL_RCC_ETHMAC_CLK_ENABLE(); \ __HAL_RCC_ETHMACTX_CLK_ENABLE(); \ __HAL_RCC_ETHMACRX_CLK_ENABLE(); \ } while(0U)
Enable ETHERNET clock.
Definition at line 1128 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMAC_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN)) |
Definition at line 1115 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMAC_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1065 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACPTP_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN)) |
Definition at line 1118 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACPTP_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1086 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACRX_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN)) |
Definition at line 1117 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACRX_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1079 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACTX_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN)) |
Definition at line 1116 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACTX_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1072 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOD_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN)) |
Definition at line 1107 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOD_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1009 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOE_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN)) |
Definition at line 1108 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOE_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1016 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOF_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN)) |
Definition at line 1109 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOF_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1030 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOG_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN)) |
Definition at line 1110 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOG_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1037 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOI_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN)) |
Definition at line 1111 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOI_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1023 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOJ_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOJEN)) |
Definition at line 1112 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOJ_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1044 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOK_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOKEN)) |
Definition at line 1113 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOK_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1051 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN)) |
Definition at line 1119 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1093 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE | ( | ) | (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN)) |
Definition at line 1120 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg = 0x00U; \ SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\ UNUSED(tmpreg); \ } while(0U)
Definition at line 1100 of file stm32f4xx_hal_rcc_ex.h.