Get the enable or disable status of the APB1 peripheral clock. More...

Defines
#define	__HAL_RCC_TIM5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)
#define	__HAL_RCC_WWDG_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)
#define	__HAL_RCC_SPI2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)
#define	__HAL_RCC_USART2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)
#define	__HAL_RCC_I2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)
#define	__HAL_RCC_I2C2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)
#define	__HAL_RCC_PWR_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)
#define	__HAL_RCC_TIM5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)
#define	__HAL_RCC_WWDG_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)
#define	__HAL_RCC_SPI2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)
#define	__HAL_RCC_USART2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)
#define	__HAL_RCC_I2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)
#define	__HAL_RCC_I2C2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)
#define	__HAL_RCC_PWR_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)

Detailed Description

Get the enable or disable status of the APB1 peripheral clock.

Note:: After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_I2C1_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)

Definition at line 566 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)

Definition at line 558 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)

Definition at line 567 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)

Definition at line 559 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)

Definition at line 568 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)

Definition at line 560 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)

Definition at line 564 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)

Definition at line 556 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)

Definition at line 562 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)

Definition at line 554 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)

Definition at line 565 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)

Definition at line 557 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_DISABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)

Definition at line 563 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_ENABLED ( ) ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)

Definition at line 555 of file stm32f4xx_hal_rcc.h.