00001
00028
00029 #ifndef __STM32F4xx_RCC_H
00030 #define __STM32F4xx_RCC_H
00031
00032 #ifdef __cplusplus
00033 extern "C" {
00034 #endif
00035
00036
00037 #include "stm32f4xx.h"
00038
00047
00048 typedef struct
00049 {
00050 uint32_t SYSCLK_Frequency;
00051 uint32_t HCLK_Frequency;
00052 uint32_t PCLK1_Frequency;
00053 uint32_t PCLK2_Frequency;
00054 }RCC_ClocksTypeDef;
00055
00056
00057
00065 #define RCC_HSE_OFF ((uint8_t)0x00)
00066 #define RCC_HSE_ON ((uint8_t)0x01)
00067 #define RCC_HSE_Bypass ((uint8_t)0x05)
00068 #define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
00069 ((HSE) == RCC_HSE_Bypass))
00070
00077 #define RCC_PLLSource_HSI ((uint32_t)0x00000000)
00078 #define RCC_PLLSource_HSE ((uint32_t)0x00400000)
00079 #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \
00080 ((SOURCE) == RCC_PLLSource_HSE))
00081 #define IS_RCC_PLLM_VALUE(VALUE) ((VALUE) <= 63)
00082 #define IS_RCC_PLLN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
00083 #define IS_RCC_PLLP_VALUE(VALUE) (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
00084 #define IS_RCC_PLLQ_VALUE(VALUE) ((4 <= (VALUE)) && ((VALUE) <= 15))
00085
00086 #define IS_RCC_PLLI2SN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
00087 #define IS_RCC_PLLI2SR_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 7))
00088
00095 #define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
00096 #define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
00097 #define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
00098 #define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
00099 ((SOURCE) == RCC_SYSCLKSource_HSE) || \
00100 ((SOURCE) == RCC_SYSCLKSource_PLLCLK))
00101
00108 #define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
00109 #define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
00110 #define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
00111 #define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
00112 #define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
00113 #define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
00114 #define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
00115 #define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
00116 #define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
00117 #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
00118 ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
00119 ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
00120 ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
00121 ((HCLK) == RCC_SYSCLK_Div512))
00122
00129 #define RCC_HCLK_Div1 ((uint32_t)0x00000000)
00130 #define RCC_HCLK_Div2 ((uint32_t)0x00001000)
00131 #define RCC_HCLK_Div4 ((uint32_t)0x00001400)
00132 #define RCC_HCLK_Div8 ((uint32_t)0x00001800)
00133 #define RCC_HCLK_Div16 ((uint32_t)0x00001C00)
00134 #define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
00135 ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
00136 ((PCLK) == RCC_HCLK_Div16))
00137
00144 #define RCC_IT_LSIRDY ((uint8_t)0x01)
00145 #define RCC_IT_LSERDY ((uint8_t)0x02)
00146 #define RCC_IT_HSIRDY ((uint8_t)0x04)
00147 #define RCC_IT_HSERDY ((uint8_t)0x08)
00148 #define RCC_IT_PLLRDY ((uint8_t)0x10)
00149 #define RCC_IT_PLLI2SRDY ((uint8_t)0x20)
00150 #define RCC_IT_CSS ((uint8_t)0x80)
00151 #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xC0) == 0x00) && ((IT) != 0x00))
00152 #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
00153 ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
00154 ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
00155 ((IT) == RCC_IT_PLLI2SRDY))
00156 #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x40) == 0x00) && ((IT) != 0x00))
00157
00164 #define RCC_LSE_OFF ((uint8_t)0x00)
00165 #define RCC_LSE_ON ((uint8_t)0x01)
00166 #define RCC_LSE_Bypass ((uint8_t)0x04)
00167 #define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
00168 ((LSE) == RCC_LSE_Bypass))
00169
00176 #define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
00177 #define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
00178 #define RCC_RTCCLKSource_HSE_Div2 ((uint32_t)0x00020300)
00179 #define RCC_RTCCLKSource_HSE_Div3 ((uint32_t)0x00030300)
00180 #define RCC_RTCCLKSource_HSE_Div4 ((uint32_t)0x00040300)
00181 #define RCC_RTCCLKSource_HSE_Div5 ((uint32_t)0x00050300)
00182 #define RCC_RTCCLKSource_HSE_Div6 ((uint32_t)0x00060300)
00183 #define RCC_RTCCLKSource_HSE_Div7 ((uint32_t)0x00070300)
00184 #define RCC_RTCCLKSource_HSE_Div8 ((uint32_t)0x00080300)
00185 #define RCC_RTCCLKSource_HSE_Div9 ((uint32_t)0x00090300)
00186 #define RCC_RTCCLKSource_HSE_Div10 ((uint32_t)0x000A0300)
00187 #define RCC_RTCCLKSource_HSE_Div11 ((uint32_t)0x000B0300)
00188 #define RCC_RTCCLKSource_HSE_Div12 ((uint32_t)0x000C0300)
00189 #define RCC_RTCCLKSource_HSE_Div13 ((uint32_t)0x000D0300)
00190 #define RCC_RTCCLKSource_HSE_Div14 ((uint32_t)0x000E0300)
00191 #define RCC_RTCCLKSource_HSE_Div15 ((uint32_t)0x000F0300)
00192 #define RCC_RTCCLKSource_HSE_Div16 ((uint32_t)0x00100300)
00193 #define RCC_RTCCLKSource_HSE_Div17 ((uint32_t)0x00110300)
00194 #define RCC_RTCCLKSource_HSE_Div18 ((uint32_t)0x00120300)
00195 #define RCC_RTCCLKSource_HSE_Div19 ((uint32_t)0x00130300)
00196 #define RCC_RTCCLKSource_HSE_Div20 ((uint32_t)0x00140300)
00197 #define RCC_RTCCLKSource_HSE_Div21 ((uint32_t)0x00150300)
00198 #define RCC_RTCCLKSource_HSE_Div22 ((uint32_t)0x00160300)
00199 #define RCC_RTCCLKSource_HSE_Div23 ((uint32_t)0x00170300)
00200 #define RCC_RTCCLKSource_HSE_Div24 ((uint32_t)0x00180300)
00201 #define RCC_RTCCLKSource_HSE_Div25 ((uint32_t)0x00190300)
00202 #define RCC_RTCCLKSource_HSE_Div26 ((uint32_t)0x001A0300)
00203 #define RCC_RTCCLKSource_HSE_Div27 ((uint32_t)0x001B0300)
00204 #define RCC_RTCCLKSource_HSE_Div28 ((uint32_t)0x001C0300)
00205 #define RCC_RTCCLKSource_HSE_Div29 ((uint32_t)0x001D0300)
00206 #define RCC_RTCCLKSource_HSE_Div30 ((uint32_t)0x001E0300)
00207 #define RCC_RTCCLKSource_HSE_Div31 ((uint32_t)0x001F0300)
00208 #define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
00209 ((SOURCE) == RCC_RTCCLKSource_LSI) || \
00210 ((SOURCE) == RCC_RTCCLKSource_HSE_Div2) || \
00211 ((SOURCE) == RCC_RTCCLKSource_HSE_Div3) || \
00212 ((SOURCE) == RCC_RTCCLKSource_HSE_Div4) || \
00213 ((SOURCE) == RCC_RTCCLKSource_HSE_Div5) || \
00214 ((SOURCE) == RCC_RTCCLKSource_HSE_Div6) || \
00215 ((SOURCE) == RCC_RTCCLKSource_HSE_Div7) || \
00216 ((SOURCE) == RCC_RTCCLKSource_HSE_Div8) || \
00217 ((SOURCE) == RCC_RTCCLKSource_HSE_Div9) || \
00218 ((SOURCE) == RCC_RTCCLKSource_HSE_Div10) || \
00219 ((SOURCE) == RCC_RTCCLKSource_HSE_Div11) || \
00220 ((SOURCE) == RCC_RTCCLKSource_HSE_Div12) || \
00221 ((SOURCE) == RCC_RTCCLKSource_HSE_Div13) || \
00222 ((SOURCE) == RCC_RTCCLKSource_HSE_Div14) || \
00223 ((SOURCE) == RCC_RTCCLKSource_HSE_Div15) || \
00224 ((SOURCE) == RCC_RTCCLKSource_HSE_Div16) || \
00225 ((SOURCE) == RCC_RTCCLKSource_HSE_Div17) || \
00226 ((SOURCE) == RCC_RTCCLKSource_HSE_Div18) || \
00227 ((SOURCE) == RCC_RTCCLKSource_HSE_Div19) || \
00228 ((SOURCE) == RCC_RTCCLKSource_HSE_Div20) || \
00229 ((SOURCE) == RCC_RTCCLKSource_HSE_Div21) || \
00230 ((SOURCE) == RCC_RTCCLKSource_HSE_Div22) || \
00231 ((SOURCE) == RCC_RTCCLKSource_HSE_Div23) || \
00232 ((SOURCE) == RCC_RTCCLKSource_HSE_Div24) || \
00233 ((SOURCE) == RCC_RTCCLKSource_HSE_Div25) || \
00234 ((SOURCE) == RCC_RTCCLKSource_HSE_Div26) || \
00235 ((SOURCE) == RCC_RTCCLKSource_HSE_Div27) || \
00236 ((SOURCE) == RCC_RTCCLKSource_HSE_Div28) || \
00237 ((SOURCE) == RCC_RTCCLKSource_HSE_Div29) || \
00238 ((SOURCE) == RCC_RTCCLKSource_HSE_Div30) || \
00239 ((SOURCE) == RCC_RTCCLKSource_HSE_Div31))
00240
00247 #define RCC_I2S2CLKSource_PLLI2S ((uint8_t)0x00)
00248 #define RCC_I2S2CLKSource_Ext ((uint8_t)0x01)
00249
00250 #define IS_RCC_I2SCLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_PLLI2S) || ((SOURCE) == RCC_I2S2CLKSource_Ext))
00251
00258 #define RCC_AHB1Periph_GPIOA ((uint32_t)0x00000001)
00259 #define RCC_AHB1Periph_GPIOB ((uint32_t)0x00000002)
00260 #define RCC_AHB1Periph_GPIOC ((uint32_t)0x00000004)
00261 #define RCC_AHB1Periph_GPIOD ((uint32_t)0x00000008)
00262 #define RCC_AHB1Periph_GPIOE ((uint32_t)0x00000010)
00263 #define RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020)
00264 #define RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040)
00265 #define RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080)
00266 #define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
00267 #define RCC_AHB1Periph_CRC ((uint32_t)0x00001000)
00268 #define RCC_AHB1Periph_FLITF ((uint32_t)0x00008000)
00269 #define RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000)
00270 #define RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000)
00271 #define RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000)
00272 #define RCC_AHB1Periph_CCMDATARAMEN ((uint32_t)0x00100000)
00273 #define RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000)
00274 #define RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000)
00275 #define RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000)
00276 #define RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000)
00277 #define RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000)
00278 #define RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000)
00279 #define RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000)
00280 #define RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000)
00281 #define IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x818BEE00) == 0x00) && ((PERIPH) != 0x00))
00282 #define IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD9FEE00) == 0x00) && ((PERIPH) != 0x00))
00283 #define IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81986E00) == 0x00) && ((PERIPH) != 0x00))
00284
00291 #define RCC_AHB2Periph_DCMI ((uint32_t)0x00000001)
00292 #define RCC_AHB2Periph_CRYP ((uint32_t)0x00000010)
00293 #define RCC_AHB2Periph_HASH ((uint32_t)0x00000020)
00294 #define RCC_AHB2Periph_RNG ((uint32_t)0x00000040)
00295 #define RCC_AHB2Periph_OTG_FS ((uint32_t)0x00000080)
00296 #define IS_RCC_AHB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFF0E) == 0x00) && ((PERIPH) != 0x00))
00297
00304 #define RCC_AHB3Periph_FSMC ((uint32_t)0x00000001)
00305 #define IS_RCC_AHB3_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFFE) == 0x00) && ((PERIPH) != 0x00))
00306
00313 #define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
00314 #define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
00315 #define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
00316 #define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
00317 #define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
00318 #define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
00319 #define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
00320 #define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
00321 #define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
00322 #define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
00323 #define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
00324 #define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
00325 #define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
00326 #define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
00327 #define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
00328 #define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
00329 #define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
00330 #define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
00331 #define RCC_APB1Periph_I2C3 ((uint32_t)0x00800000)
00332 #define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
00333 #define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
00334 #define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
00335 #define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
00336 #define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC9013600) == 0x00) && ((PERIPH) != 0x00))
00337
00344 #define RCC_APB2Periph_TIM1 ((uint32_t)0x00000001)
00345 #define RCC_APB2Periph_TIM8 ((uint32_t)0x00000002)
00346 #define RCC_APB2Periph_USART1 ((uint32_t)0x00000010)
00347 #define RCC_APB2Periph_USART6 ((uint32_t)0x00000020)
00348 #define RCC_APB2Periph_ADC ((uint32_t)0x00000100)
00349 #define RCC_APB2Periph_ADC1 ((uint32_t)0x00000100)
00350 #define RCC_APB2Periph_ADC2 ((uint32_t)0x00000200)
00351 #define RCC_APB2Periph_ADC3 ((uint32_t)0x00000400)
00352 #define RCC_APB2Periph_SDIO ((uint32_t)0x00000800)
00353 #define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
00354 #define RCC_APB2Periph_SYSCFG ((uint32_t)0x00004000)
00355 #define RCC_APB2Periph_TIM9 ((uint32_t)0x00010000)
00356 #define RCC_APB2Periph_TIM10 ((uint32_t)0x00020000)
00357 #define RCC_APB2Periph_TIM11 ((uint32_t)0x00040000)
00358 #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A0CC) == 0x00) && ((PERIPH) != 0x00))
00359 #define IS_RCC_APB2_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A6CC) == 0x00) && ((PERIPH) != 0x00))
00360
00367 #define RCC_MCO1Source_HSI ((uint32_t)0x00000000)
00368 #define RCC_MCO1Source_LSE ((uint32_t)0x00200000)
00369 #define RCC_MCO1Source_HSE ((uint32_t)0x00400000)
00370 #define RCC_MCO1Source_PLLCLK ((uint32_t)0x00600000)
00371 #define RCC_MCO1Div_1 ((uint32_t)0x00000000)
00372 #define RCC_MCO1Div_2 ((uint32_t)0x04000000)
00373 #define RCC_MCO1Div_3 ((uint32_t)0x05000000)
00374 #define RCC_MCO1Div_4 ((uint32_t)0x06000000)
00375 #define RCC_MCO1Div_5 ((uint32_t)0x07000000)
00376 #define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1Source_HSI) || ((SOURCE) == RCC_MCO1Source_LSE) || \
00377 ((SOURCE) == RCC_MCO1Source_HSE) || ((SOURCE) == RCC_MCO1Source_PLLCLK))
00378
00379 #define IS_RCC_MCO1DIV(DIV) (((DIV) == RCC_MCO1Div_1) || ((DIV) == RCC_MCO1Div_2) || \
00380 ((DIV) == RCC_MCO1Div_3) || ((DIV) == RCC_MCO1Div_4) || \
00381 ((DIV) == RCC_MCO1Div_5))
00382
00389 #define RCC_MCO2Source_SYSCLK ((uint32_t)0x00000000)
00390 #define RCC_MCO2Source_PLLI2SCLK ((uint32_t)0x40000000)
00391 #define RCC_MCO2Source_HSE ((uint32_t)0x80000000)
00392 #define RCC_MCO2Source_PLLCLK ((uint32_t)0xC0000000)
00393 #define RCC_MCO2Div_1 ((uint32_t)0x00000000)
00394 #define RCC_MCO2Div_2 ((uint32_t)0x20000000)
00395 #define RCC_MCO2Div_3 ((uint32_t)0x28000000)
00396 #define RCC_MCO2Div_4 ((uint32_t)0x30000000)
00397 #define RCC_MCO2Div_5 ((uint32_t)0x38000000)
00398 #define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2Source_SYSCLK) || ((SOURCE) == RCC_MCO2Source_PLLI2SCLK)|| \
00399 ((SOURCE) == RCC_MCO2Source_HSE) || ((SOURCE) == RCC_MCO2Source_PLLCLK))
00400
00401 #define IS_RCC_MCO2DIV(DIV) (((DIV) == RCC_MCO2Div_1) || ((DIV) == RCC_MCO2Div_2) || \
00402 ((DIV) == RCC_MCO2Div_3) || ((DIV) == RCC_MCO2Div_4) || \
00403 ((DIV) == RCC_MCO2Div_5))
00404
00411 #define RCC_FLAG_HSIRDY ((uint8_t)0x21)
00412 #define RCC_FLAG_HSERDY ((uint8_t)0x31)
00413 #define RCC_FLAG_PLLRDY ((uint8_t)0x39)
00414 #define RCC_FLAG_PLLI2SRDY ((uint8_t)0x3B)
00415 #define RCC_FLAG_LSERDY ((uint8_t)0x41)
00416 #define RCC_FLAG_LSIRDY ((uint8_t)0x61)
00417 #define RCC_FLAG_BORRST ((uint8_t)0x79)
00418 #define RCC_FLAG_PINRST ((uint8_t)0x7A)
00419 #define RCC_FLAG_PORRST ((uint8_t)0x7B)
00420 #define RCC_FLAG_SFTRST ((uint8_t)0x7C)
00421 #define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
00422 #define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
00423 #define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
00424 #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
00425 ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
00426 ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_BORRST) || \
00427 ((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
00428 ((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
00429 ((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
00430 ((FLAG) == RCC_FLAG_PLLI2SRDY))
00431 #define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
00432
00440
00441
00442
00443
00444 void RCC_DeInit(void);
00445
00446
00447 void RCC_HSEConfig(uint8_t RCC_HSE);
00448 ErrorStatus RCC_WaitForHSEStartUp(void);
00449 void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
00450 void RCC_HSICmd(FunctionalState NewState);
00451 void RCC_LSEConfig(uint8_t RCC_LSE);
00452 void RCC_LSICmd(FunctionalState NewState);
00453
00454 void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ);
00455 void RCC_PLLCmd(FunctionalState NewState);
00456 void RCC_PLLI2SConfig(uint32_t PLLI2SN, uint32_t PLLI2SR);
00457 void RCC_PLLI2SCmd(FunctionalState NewState);
00458
00459 void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
00460 void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div);
00461 void RCC_MCO2Config(uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div);
00462
00463
00464 void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
00465 uint8_t RCC_GetSYSCLKSource(void);
00466 void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
00467 void RCC_PCLK1Config(uint32_t RCC_HCLK);
00468 void RCC_PCLK2Config(uint32_t RCC_HCLK);
00469 void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
00470
00471
00472 void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
00473 void RCC_RTCCLKCmd(FunctionalState NewState);
00474 void RCC_BackupResetCmd(FunctionalState NewState);
00475 void RCC_I2SCLKConfig(uint32_t RCC_I2SCLKSource);
00476
00477 void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
00478 void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
00479 void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
00480 void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
00481 void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
00482
00483 void RCC_AHB1PeriphResetCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
00484 void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
00485 void RCC_AHB3PeriphResetCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
00486 void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
00487 void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
00488
00489 void RCC_AHB1PeriphClockLPModeCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
00490 void RCC_AHB2PeriphClockLPModeCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
00491 void RCC_AHB3PeriphClockLPModeCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
00492 void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
00493 void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
00494
00495
00496 void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
00497 FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
00498 void RCC_ClearFlag(void);
00499 ITStatus RCC_GetITStatus(uint8_t RCC_IT);
00500 void RCC_ClearITPendingBit(uint8_t RCC_IT);
00501
00502 #ifdef __cplusplus
00503 }
00504 #endif
00505
00506 #endif
00507
00516