00001
00029
00030 #ifndef __STM32F4xx_FSMC_H
00031 #define __STM32F4xx_FSMC_H
00032
00033 #ifdef __cplusplus
00034 extern "C" {
00035 #endif
00036
00037
00038 #include "stm32f4xx.h"
00039
00048
00049
00053 typedef struct
00054 {
00055 uint32_t FSMC_AddressSetupTime;
00060 uint32_t FSMC_AddressHoldTime;
00065 uint32_t FSMC_DataSetupTime;
00070 uint32_t FSMC_BusTurnAroundDuration;
00075 uint32_t FSMC_CLKDivision;
00079 uint32_t FSMC_DataLatency;
00087 uint32_t FSMC_AccessMode;
00089 }FSMC_NORSRAMTimingInitTypeDef;
00090
00094 typedef struct
00095 {
00096 uint32_t FSMC_Bank;
00099 uint32_t FSMC_DataAddressMux;
00103 uint32_t FSMC_MemoryType;
00107 uint32_t FSMC_MemoryDataWidth;
00110 uint32_t FSMC_BurstAccessMode;
00114 uint32_t FSMC_AsynchronousWait;
00118 uint32_t FSMC_WaitSignalPolarity;
00122 uint32_t FSMC_WrapMode;
00126 uint32_t FSMC_WaitSignalActive;
00131 uint32_t FSMC_WriteOperation;
00134 uint32_t FSMC_WaitSignal;
00138 uint32_t FSMC_ExtendedMode;
00141 uint32_t FSMC_WriteBurst;
00144 FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct;
00146 FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct;
00147 }FSMC_NORSRAMInitTypeDef;
00148
00152 typedef struct
00153 {
00154 uint32_t FSMC_SetupTime;
00160 uint32_t FSMC_WaitSetupTime;
00166 uint32_t FSMC_HoldSetupTime;
00173 uint32_t FSMC_HiZSetupTime;
00178 }FSMC_NAND_PCCARDTimingInitTypeDef;
00179
00183 typedef struct
00184 {
00185 uint32_t FSMC_Bank;
00188 uint32_t FSMC_Waitfeature;
00191 uint32_t FSMC_MemoryDataWidth;
00194 uint32_t FSMC_ECC;
00197 uint32_t FSMC_ECCPageSize;
00200 uint32_t FSMC_TCLRSetupTime;
00204 uint32_t FSMC_TARSetupTime;
00208 FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct;
00210 FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct;
00211 }FSMC_NANDInitTypeDef;
00212
00217 typedef struct
00218 {
00219 uint32_t FSMC_Waitfeature;
00222 uint32_t FSMC_TCLRSetupTime;
00226 uint32_t FSMC_TARSetupTime;
00231 FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct;
00233 FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct;
00235 FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct;
00236 }FSMC_PCCARDInitTypeDef;
00237
00238
00239
00247 #define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
00248 #define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
00249 #define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
00250 #define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
00251
00258 #define FSMC_Bank2_NAND ((uint32_t)0x00000010)
00259 #define FSMC_Bank3_NAND ((uint32_t)0x00000100)
00260
00267 #define FSMC_Bank4_PCCARD ((uint32_t)0x00001000)
00268
00272 #define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
00273 ((BANK) == FSMC_Bank1_NORSRAM2) || \
00274 ((BANK) == FSMC_Bank1_NORSRAM3) || \
00275 ((BANK) == FSMC_Bank1_NORSRAM4))
00276
00277 #define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
00278 ((BANK) == FSMC_Bank3_NAND))
00279
00280 #define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
00281 ((BANK) == FSMC_Bank3_NAND) || \
00282 ((BANK) == FSMC_Bank4_PCCARD))
00283
00284 #define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
00285 ((BANK) == FSMC_Bank3_NAND) || \
00286 ((BANK) == FSMC_Bank4_PCCARD))
00287
00296 #define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
00297 #define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
00298 #define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
00299 ((MUX) == FSMC_DataAddressMux_Enable))
00300
00308 #define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
00309 #define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
00310 #define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
00311 #define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
00312 ((MEMORY) == FSMC_MemoryType_PSRAM)|| \
00313 ((MEMORY) == FSMC_MemoryType_NOR))
00314
00322 #define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
00323 #define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
00324 #define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
00325 ((WIDTH) == FSMC_MemoryDataWidth_16b))
00326
00334 #define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)
00335 #define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
00336 #define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
00337 ((STATE) == FSMC_BurstAccessMode_Enable))
00338
00345 #define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)
00346 #define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)
00347 #define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \
00348 ((STATE) == FSMC_AsynchronousWait_Enable))
00349
00356 #define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
00357 #define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
00358 #define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
00359 ((POLARITY) == FSMC_WaitSignalPolarity_High))
00360
00367 #define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
00368 #define FSMC_WrapMode_Enable ((uint32_t)0x00000400)
00369 #define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
00370 ((MODE) == FSMC_WrapMode_Enable))
00371
00378 #define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
00379 #define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)
00380 #define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
00381 ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
00382
00389 #define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
00390 #define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
00391 #define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
00392 ((OPERATION) == FSMC_WriteOperation_Enable))
00393
00400 #define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
00401 #define FSMC_WaitSignal_Enable ((uint32_t)0x00002000)
00402 #define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
00403 ((SIGNAL) == FSMC_WaitSignal_Enable))
00404
00411 #define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
00412 #define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
00413
00414 #define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
00415 ((MODE) == FSMC_ExtendedMode_Enable))
00416
00424 #define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
00425 #define FSMC_WriteBurst_Enable ((uint32_t)0x00080000)
00426 #define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
00427 ((BURST) == FSMC_WriteBurst_Enable))
00428
00435 #define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
00436
00443 #define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
00444
00451 #define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
00452
00459 #define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
00460
00467 #define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
00468
00475 #define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
00476
00483 #define FSMC_AccessMode_A ((uint32_t)0x00000000)
00484 #define FSMC_AccessMode_B ((uint32_t)0x10000000)
00485 #define FSMC_AccessMode_C ((uint32_t)0x20000000)
00486 #define FSMC_AccessMode_D ((uint32_t)0x30000000)
00487 #define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
00488 ((MODE) == FSMC_AccessMode_B) || \
00489 ((MODE) == FSMC_AccessMode_C) || \
00490 ((MODE) == FSMC_AccessMode_D))
00491
00506 #define FSMC_Waitfeature_Disable ((uint32_t)0x00000000)
00507 #define FSMC_Waitfeature_Enable ((uint32_t)0x00000002)
00508 #define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \
00509 ((FEATURE) == FSMC_Waitfeature_Enable))
00510
00518 #define FSMC_ECC_Disable ((uint32_t)0x00000000)
00519 #define FSMC_ECC_Enable ((uint32_t)0x00000040)
00520 #define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \
00521 ((STATE) == FSMC_ECC_Enable))
00522
00529 #define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000)
00530 #define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000)
00531 #define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000)
00532 #define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000)
00533 #define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000)
00534 #define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000)
00535 #define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \
00536 ((SIZE) == FSMC_ECCPageSize_512Bytes) || \
00537 ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \
00538 ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \
00539 ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \
00540 ((SIZE) == FSMC_ECCPageSize_8192Bytes))
00541
00548 #define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)
00549
00556 #define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)
00557
00564 #define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)
00565
00572 #define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)
00573
00580 #define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)
00581
00588 #define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)
00589
00596 #define FSMC_IT_RisingEdge ((uint32_t)0x00000008)
00597 #define FSMC_IT_Level ((uint32_t)0x00000010)
00598 #define FSMC_IT_FallingEdge ((uint32_t)0x00000020)
00599 #define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))
00600 #define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \
00601 ((IT) == FSMC_IT_Level) || \
00602 ((IT) == FSMC_IT_FallingEdge))
00603
00610 #define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001)
00611 #define FSMC_FLAG_Level ((uint32_t)0x00000002)
00612 #define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004)
00613 #define FSMC_FLAG_FEMPT ((uint32_t)0x00000040)
00614 #define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \
00615 ((FLAG) == FSMC_FLAG_Level) || \
00616 ((FLAG) == FSMC_FLAG_FallingEdge) || \
00617 ((FLAG) == FSMC_FLAG_FEMPT))
00618
00619 #define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
00620
00632
00633
00634
00635
00636 void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
00637 void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
00638 void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
00639 void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
00640
00641
00642 void FSMC_NANDDeInit(uint32_t FSMC_Bank);
00643 void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
00644 void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
00645 void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState);
00646 void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState);
00647 uint32_t FSMC_GetECC(uint32_t FSMC_Bank);
00648
00649
00650 void FSMC_PCCARDDeInit(void);
00651 void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
00652 void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
00653 void FSMC_PCCARDCmd(FunctionalState NewState);
00654
00655
00656 void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState);
00657 FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
00658 void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
00659 ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT);
00660 void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT);
00661
00662 #ifdef __cplusplus
00663 }
00664 #endif
00665
00666 #endif
00667
00675