00001
00029
00030 #ifndef __STM32F4xx_ADC_H
00031 #define __STM32F4xx_ADC_H
00032
00033 #ifdef __cplusplus
00034 extern "C" {
00035 #endif
00036
00037
00038 #include "stm32f4xx.h"
00039
00048
00049
00053 typedef struct
00054 {
00055 uint32_t ADC_Resolution;
00057 FunctionalState ADC_ScanConvMode;
00061 FunctionalState ADC_ContinuousConvMode;
00064 uint32_t ADC_ExternalTrigConvEdge;
00068 uint32_t ADC_ExternalTrigConv;
00072 uint32_t ADC_DataAlign;
00075 uint8_t ADC_NbrOfConversion;
00079 }ADC_InitTypeDef;
00080
00084 typedef struct
00085 {
00086 uint32_t ADC_Mode;
00089 uint32_t ADC_Prescaler;
00092 uint32_t ADC_DMAAccessMode;
00096 uint32_t ADC_TwoSamplingDelay;
00100 }ADC_CommonInitTypeDef;
00101
00102
00103
00104
00108 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
00109 ((PERIPH) == ADC2) || \
00110 ((PERIPH) == ADC3))
00111
00115 #define ADC_Mode_Independent ((uint32_t)0x00000000)
00116 #define ADC_DualMode_RegSimult_InjecSimult ((uint32_t)0x00000001)
00117 #define ADC_DualMode_RegSimult_AlterTrig ((uint32_t)0x00000002)
00118 #define ADC_DualMode_InjecSimult ((uint32_t)0x00000005)
00119 #define ADC_DualMode_RegSimult ((uint32_t)0x00000006)
00120 #define ADC_DualMode_Interl ((uint32_t)0x00000007)
00121 #define ADC_DualMode_AlterTrig ((uint32_t)0x00000009)
00122 #define ADC_TripleMode_RegSimult_InjecSimult ((uint32_t)0x00000011)
00123 #define ADC_TripleMode_RegSimult_AlterTrig ((uint32_t)0x00000012)
00124 #define ADC_TripleMode_InjecSimult ((uint32_t)0x00000015)
00125 #define ADC_TripleMode_RegSimult ((uint32_t)0x00000016)
00126 #define ADC_TripleMode_Interl ((uint32_t)0x00000017)
00127 #define ADC_TripleMode_AlterTrig ((uint32_t)0x00000019)
00128 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
00129 ((MODE) == ADC_DualMode_RegSimult_InjecSimult) || \
00130 ((MODE) == ADC_DualMode_RegSimult_AlterTrig) || \
00131 ((MODE) == ADC_DualMode_InjecSimult) || \
00132 ((MODE) == ADC_DualMode_RegSimult) || \
00133 ((MODE) == ADC_DualMode_Interl) || \
00134 ((MODE) == ADC_DualMode_AlterTrig) || \
00135 ((MODE) == ADC_TripleMode_RegSimult_InjecSimult) || \
00136 ((MODE) == ADC_TripleMode_RegSimult_AlterTrig) || \
00137 ((MODE) == ADC_TripleMode_InjecSimult) || \
00138 ((MODE) == ADC_TripleMode_RegSimult) || \
00139 ((MODE) == ADC_TripleMode_Interl) || \
00140 ((MODE) == ADC_TripleMode_AlterTrig))
00141
00149 #define ADC_Prescaler_Div2 ((uint32_t)0x00000000)
00150 #define ADC_Prescaler_Div4 ((uint32_t)0x00010000)
00151 #define ADC_Prescaler_Div6 ((uint32_t)0x00020000)
00152 #define ADC_Prescaler_Div8 ((uint32_t)0x00030000)
00153 #define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div2) || \
00154 ((PRESCALER) == ADC_Prescaler_Div4) || \
00155 ((PRESCALER) == ADC_Prescaler_Div6) || \
00156 ((PRESCALER) == ADC_Prescaler_Div8))
00157
00165 #define ADC_DMAAccessMode_Disabled ((uint32_t)0x00000000)
00166 #define ADC_DMAAccessMode_1 ((uint32_t)0x00004000)
00167 #define ADC_DMAAccessMode_2 ((uint32_t)0x00008000)
00168 #define ADC_DMAAccessMode_3 ((uint32_t)0x0000C000)
00169 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
00170 ((MODE) == ADC_DMAAccessMode_1) || \
00171 ((MODE) == ADC_DMAAccessMode_2) || \
00172 ((MODE) == ADC_DMAAccessMode_3))
00173
00182 #define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
00183 #define ADC_TwoSamplingDelay_6Cycles ((uint32_t)0x00000100)
00184 #define ADC_TwoSamplingDelay_7Cycles ((uint32_t)0x00000200)
00185 #define ADC_TwoSamplingDelay_8Cycles ((uint32_t)0x00000300)
00186 #define ADC_TwoSamplingDelay_9Cycles ((uint32_t)0x00000400)
00187 #define ADC_TwoSamplingDelay_10Cycles ((uint32_t)0x00000500)
00188 #define ADC_TwoSamplingDelay_11Cycles ((uint32_t)0x00000600)
00189 #define ADC_TwoSamplingDelay_12Cycles ((uint32_t)0x00000700)
00190 #define ADC_TwoSamplingDelay_13Cycles ((uint32_t)0x00000800)
00191 #define ADC_TwoSamplingDelay_14Cycles ((uint32_t)0x00000900)
00192 #define ADC_TwoSamplingDelay_15Cycles ((uint32_t)0x00000A00)
00193 #define ADC_TwoSamplingDelay_16Cycles ((uint32_t)0x00000B00)
00194 #define ADC_TwoSamplingDelay_17Cycles ((uint32_t)0x00000C00)
00195 #define ADC_TwoSamplingDelay_18Cycles ((uint32_t)0x00000D00)
00196 #define ADC_TwoSamplingDelay_19Cycles ((uint32_t)0x00000E00)
00197 #define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
00198 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TwoSamplingDelay_5Cycles) || \
00199 ((DELAY) == ADC_TwoSamplingDelay_6Cycles) || \
00200 ((DELAY) == ADC_TwoSamplingDelay_7Cycles) || \
00201 ((DELAY) == ADC_TwoSamplingDelay_8Cycles) || \
00202 ((DELAY) == ADC_TwoSamplingDelay_9Cycles) || \
00203 ((DELAY) == ADC_TwoSamplingDelay_10Cycles) || \
00204 ((DELAY) == ADC_TwoSamplingDelay_11Cycles) || \
00205 ((DELAY) == ADC_TwoSamplingDelay_12Cycles) || \
00206 ((DELAY) == ADC_TwoSamplingDelay_13Cycles) || \
00207 ((DELAY) == ADC_TwoSamplingDelay_14Cycles) || \
00208 ((DELAY) == ADC_TwoSamplingDelay_15Cycles) || \
00209 ((DELAY) == ADC_TwoSamplingDelay_16Cycles) || \
00210 ((DELAY) == ADC_TwoSamplingDelay_17Cycles) || \
00211 ((DELAY) == ADC_TwoSamplingDelay_18Cycles) || \
00212 ((DELAY) == ADC_TwoSamplingDelay_19Cycles) || \
00213 ((DELAY) == ADC_TwoSamplingDelay_20Cycles))
00214
00223 #define ADC_Resolution_12b ((uint32_t)0x00000000)
00224 #define ADC_Resolution_10b ((uint32_t)0x01000000)
00225 #define ADC_Resolution_8b ((uint32_t)0x02000000)
00226 #define ADC_Resolution_6b ((uint32_t)0x03000000)
00227 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
00228 ((RESOLUTION) == ADC_Resolution_10b) || \
00229 ((RESOLUTION) == ADC_Resolution_8b) || \
00230 ((RESOLUTION) == ADC_Resolution_6b))
00231
00240 #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
00241 #define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000)
00242 #define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000)
00243 #define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000)
00244 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
00245 ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
00246 ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
00247 ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
00248
00256 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)
00257 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x01000000)
00258 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x02000000)
00259 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000)
00260 #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x04000000)
00261 #define ADC_ExternalTrigConv_T2_CC4 ((uint32_t)0x05000000)
00262 #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000)
00263 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000)
00264 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x08000000)
00265 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x09000000)
00266 #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x0A000000)
00267 #define ADC_ExternalTrigConv_T5_CC2 ((uint32_t)0x0B000000)
00268 #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x0C000000)
00269 #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x0D000000)
00270 #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x0E000000)
00271 #define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000)
00272 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
00273 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
00274 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
00275 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
00276 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
00277 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC4) || \
00278 ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
00279 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
00280 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
00281 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
00282 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
00283 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC2) || \
00284 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3) || \
00285 ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
00286 ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
00287 ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11))
00288
00296 #define ADC_DataAlign_Right ((uint32_t)0x00000000)
00297 #define ADC_DataAlign_Left ((uint32_t)0x00000800)
00298 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
00299 ((ALIGN) == ADC_DataAlign_Left))
00300
00308 #define ADC_Channel_0 ((uint8_t)0x00)
00309 #define ADC_Channel_1 ((uint8_t)0x01)
00310 #define ADC_Channel_2 ((uint8_t)0x02)
00311 #define ADC_Channel_3 ((uint8_t)0x03)
00312 #define ADC_Channel_4 ((uint8_t)0x04)
00313 #define ADC_Channel_5 ((uint8_t)0x05)
00314 #define ADC_Channel_6 ((uint8_t)0x06)
00315 #define ADC_Channel_7 ((uint8_t)0x07)
00316 #define ADC_Channel_8 ((uint8_t)0x08)
00317 #define ADC_Channel_9 ((uint8_t)0x09)
00318 #define ADC_Channel_10 ((uint8_t)0x0A)
00319 #define ADC_Channel_11 ((uint8_t)0x0B)
00320 #define ADC_Channel_12 ((uint8_t)0x0C)
00321 #define ADC_Channel_13 ((uint8_t)0x0D)
00322 #define ADC_Channel_14 ((uint8_t)0x0E)
00323 #define ADC_Channel_15 ((uint8_t)0x0F)
00324 #define ADC_Channel_16 ((uint8_t)0x10)
00325 #define ADC_Channel_17 ((uint8_t)0x11)
00326 #define ADC_Channel_18 ((uint8_t)0x12)
00327
00328 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
00329 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
00330 #define ADC_Channel_Vbat ((uint8_t)ADC_Channel_18)
00331
00332 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || \
00333 ((CHANNEL) == ADC_Channel_1) || \
00334 ((CHANNEL) == ADC_Channel_2) || \
00335 ((CHANNEL) == ADC_Channel_3) || \
00336 ((CHANNEL) == ADC_Channel_4) || \
00337 ((CHANNEL) == ADC_Channel_5) || \
00338 ((CHANNEL) == ADC_Channel_6) || \
00339 ((CHANNEL) == ADC_Channel_7) || \
00340 ((CHANNEL) == ADC_Channel_8) || \
00341 ((CHANNEL) == ADC_Channel_9) || \
00342 ((CHANNEL) == ADC_Channel_10) || \
00343 ((CHANNEL) == ADC_Channel_11) || \
00344 ((CHANNEL) == ADC_Channel_12) || \
00345 ((CHANNEL) == ADC_Channel_13) || \
00346 ((CHANNEL) == ADC_Channel_14) || \
00347 ((CHANNEL) == ADC_Channel_15) || \
00348 ((CHANNEL) == ADC_Channel_16) || \
00349 ((CHANNEL) == ADC_Channel_17) || \
00350 ((CHANNEL) == ADC_Channel_18))
00351
00359 #define ADC_SampleTime_3Cycles ((uint8_t)0x00)
00360 #define ADC_SampleTime_15Cycles ((uint8_t)0x01)
00361 #define ADC_SampleTime_28Cycles ((uint8_t)0x02)
00362 #define ADC_SampleTime_56Cycles ((uint8_t)0x03)
00363 #define ADC_SampleTime_84Cycles ((uint8_t)0x04)
00364 #define ADC_SampleTime_112Cycles ((uint8_t)0x05)
00365 #define ADC_SampleTime_144Cycles ((uint8_t)0x06)
00366 #define ADC_SampleTime_480Cycles ((uint8_t)0x07)
00367 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_3Cycles) || \
00368 ((TIME) == ADC_SampleTime_15Cycles) || \
00369 ((TIME) == ADC_SampleTime_28Cycles) || \
00370 ((TIME) == ADC_SampleTime_56Cycles) || \
00371 ((TIME) == ADC_SampleTime_84Cycles) || \
00372 ((TIME) == ADC_SampleTime_112Cycles) || \
00373 ((TIME) == ADC_SampleTime_144Cycles) || \
00374 ((TIME) == ADC_SampleTime_480Cycles))
00375
00383 #define ADC_ExternalTrigInjecConvEdge_None ((uint32_t)0x00000000)
00384 #define ADC_ExternalTrigInjecConvEdge_Rising ((uint32_t)0x00100000)
00385 #define ADC_ExternalTrigInjecConvEdge_Falling ((uint32_t)0x00200000)
00386 #define ADC_ExternalTrigInjecConvEdge_RisingFalling ((uint32_t)0x00300000)
00387 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecConvEdge_None) || \
00388 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Rising) || \
00389 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Falling) || \
00390 ((EDGE) == ADC_ExternalTrigInjecConvEdge_RisingFalling))
00391
00400 #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00000000)
00401 #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00010000)
00402 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00020000)
00403 #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00030000)
00404 #define ADC_ExternalTrigInjecConv_T3_CC2 ((uint32_t)0x00040000)
00405 #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00050000)
00406 #define ADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00060000)
00407 #define ADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00070000)
00408 #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00080000)
00409 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00090000)
00410 #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x000A0000)
00411 #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x000B0000)
00412 #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x000C0000)
00413 #define ADC_ExternalTrigInjecConv_T8_CC3 ((uint32_t)0x000D0000)
00414 #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x000E0000)
00415 #define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x000F0000)
00416 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
00417 ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
00418 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
00419 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
00420 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC2) || \
00421 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
00422 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC1) || \
00423 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC2) || \
00424 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
00425 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
00426 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4) || \
00427 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
00428 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
00429 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC3) || \
00430 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
00431 ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15))
00432
00440 #define ADC_InjectedChannel_1 ((uint8_t)0x14)
00441 #define ADC_InjectedChannel_2 ((uint8_t)0x18)
00442 #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
00443 #define ADC_InjectedChannel_4 ((uint8_t)0x20)
00444 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
00445 ((CHANNEL) == ADC_InjectedChannel_2) || \
00446 ((CHANNEL) == ADC_InjectedChannel_3) || \
00447 ((CHANNEL) == ADC_InjectedChannel_4))
00448
00456 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
00457 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
00458 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
00459 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
00460 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
00461 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
00462 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
00463 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
00464 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
00465 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
00466 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
00467 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
00468 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
00469 ((WATCHDOG) == ADC_AnalogWatchdog_None))
00470
00478 #define ADC_IT_EOC ((uint16_t)0x0205)
00479 #define ADC_IT_AWD ((uint16_t)0x0106)
00480 #define ADC_IT_JEOC ((uint16_t)0x0407)
00481 #define ADC_IT_OVR ((uint16_t)0x201A)
00482 #define IS_ADC_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
00483 ((IT) == ADC_IT_JEOC)|| ((IT) == ADC_IT_OVR))
00484
00492 #define ADC_FLAG_AWD ((uint8_t)0x01)
00493 #define ADC_FLAG_EOC ((uint8_t)0x02)
00494 #define ADC_FLAG_JEOC ((uint8_t)0x04)
00495 #define ADC_FLAG_JSTRT ((uint8_t)0x08)
00496 #define ADC_FLAG_STRT ((uint8_t)0x10)
00497 #define ADC_FLAG_OVR ((uint8_t)0x20)
00498
00499 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xC0) == 0x00) && ((FLAG) != 0x00))
00500 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || \
00501 ((FLAG) == ADC_FLAG_EOC) || \
00502 ((FLAG) == ADC_FLAG_JEOC) || \
00503 ((FLAG)== ADC_FLAG_JSTRT) || \
00504 ((FLAG) == ADC_FLAG_STRT) || \
00505 ((FLAG)== ADC_FLAG_OVR))
00506
00514 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
00515
00523 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
00524
00532 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
00533
00541 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
00542
00550 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
00551
00559 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
00560
00568 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
00569
00578
00579
00580
00581
00582 void ADC_DeInit(void);
00583
00584
00585 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
00586 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
00587 void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
00588 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
00589 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00590
00591
00592 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
00593 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold);
00594 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
00595
00596
00597 void ADC_TempSensorVrefintCmd(FunctionalState NewState);
00598 void ADC_VBATCmd(FunctionalState NewState);
00599
00600
00601 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
00602 void ADC_SoftwareStartConv(ADC_TypeDef* ADCx);
00603 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
00604 void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00605 void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00606 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
00607 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00608 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
00609 uint32_t ADC_GetMultiModeConversionValue(void);
00610
00611
00612 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00613 void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00614 void ADC_MultiModeDMARequestAfterLastTransferCmd(FunctionalState NewState);
00615
00616
00617 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
00618 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
00619 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
00620 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
00621 void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge);
00622 void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx);
00623 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
00624 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00625 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00626 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
00627
00628
00629 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
00630 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
00631 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
00632 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
00633 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
00634
00635 #ifdef __cplusplus
00636 }
00637 #endif
00638
00639 #endif
00640
00649